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1. 发明申请

US20100045440A1 IMPLANTABLE DEVICE WITH REMOTE READOUT 审中-公开
标题翻译：具有远程读取功能的可移植设备
公开(公告)号：US20100045440A1
公开(公告)日：2010-02-25
申请号：US12447678
申请日：2007-10-31
申请人： Remco Henricus Wilhelmus Pijnenburg , Youri Victorovitch Ponomarev , Matthias Merz , Ronald Dekker
发明人： Remco Henricus Wilhelmus Pijnenburg , Youri Victorovitch Ponomarev , Matthias Merz , Ronald Dekker
IPC分类号： H04Q5/22
CPC分类号： G06K19/0723 , G06K7/0008
摘要： The invention relates to a remotely readable electronic device (10), particularly an implantable device, with an O associated reader (20). The device comprises a resonance circuit (12) that can selectively be set into one of at least three different resonance states, wherein this state can wirelessly be sensed by the remote reader. In a particular embodiment, the resonance circuit (12) comprises two capacitors (C1, C2) that can selectively be connected or disconnected to the resonance circuit (12). The reader (20) preferably scans a given frequency range to detect spectral absorption patterns that correspond to certain resonance states of the resonance circuit (12).
摘要翻译：本发明涉及一种具有O相关阅读器（20）的远程可读电子设备（10），特别是可植入设备。该装置包括可选择性地设置为至少三种不同共振状态中的一种的谐振电路（12），其中该状态可以由远程读取器无线地感测。在一个具体实施例中，谐振电路（12）包括两个电容器（C1，C2），可以选择性地连接或断开到谐振电路（12）。读取器（20）优选地扫描给定的频率范围以检测对应于谐振电路（12）的某些谐振状态的光谱吸收模式。

2. 发明授权

US08906534B2 Stacked multi-cell battery concept 有权
标题翻译：堆叠多节电池概念
公开(公告)号：US08906534B2
公开(公告)日：2014-12-09
申请号：US12474165
申请日：2009-05-28
申请人： Romano Hoofman , Aurelie Humbert , Matthias Merz , Youri Victorovitch Ponomarev , Remco Henricus Wilhelmus Pijnenburg , Gilberto Curatola
发明人： Romano Hoofman , Aurelie Humbert , Matthias Merz , Youri Victorovitch Ponomarev , Remco Henricus Wilhelmus Pijnenburg , Gilberto Curatola
IPC分类号： H01M6/18 , H01M10/05 , H01M6/40 , H01M4/70 , H01M10/04 , H01M10/0585 , H01M10/0562
CPC分类号： H01M6/40 , H01M4/70 , H01M6/18 , H01M6/188 , H01M10/0436 , H01M10/0562 , H01M10/0585 , Y10T29/49108
摘要： A device is provided that includes a battery layer on a substrate, where a first battery cell is formed in the battery layer. The first battery cell includes a first anode, a first cathode, and a first electrolyte arranged between the first anode and the first cathode, where the first anode, the first cathode, and the first electrolyte are arranged in the battery layer such that perpendicular projections onto the substrate of each of the first anode and the first cathode are non-overlapping. A method of manufacturing such device is also provided. A system is also provide that includes such device for supplying power to an electronic device.
摘要翻译：提供了一种在基板上包括电池层的装置，其中第一电池单体形成在电池层中。第一电池单元包括第一阳极，第一阴极和布置在第一阳极和第一阴极之间的第一电解质，其中第一阳极，第一阴极和第一电解质布置在电池层中，使得垂直突起在第一阳极和第一阴极中的每一个的衬底上是不重叠的。还提供了制造这种装置的方法。还提供一种包括用于向电子设备供电的设备的系统。

3. 发明申请

US20090297938A1 STACKED MULTI-CELL BATTERY CONCEPT 有权
标题翻译：堆叠式多电池电池概念
公开(公告)号：US20090297938A1
公开(公告)日：2009-12-03
申请号：US12474165
申请日：2009-05-28
申请人： Romano HOOFMAN , Aurelie Humbert , Matthias Merz , Youri Victorovitch Ponomarev , Remco Henricus Wilhelmus Pijnenburg , Gilberto Curatola
发明人： Romano HOOFMAN , Aurelie Humbert , Matthias Merz , Youri Victorovitch Ponomarev , Remco Henricus Wilhelmus Pijnenburg , Gilberto Curatola
IPC分类号： H01M6/42 , H01M4/02 , B05D5/12
CPC分类号： H01M6/40 , H01M4/70 , H01M6/18 , H01M6/188 , H01M10/0436 , H01M10/0562 , H01M10/0585 , Y10T29/49108
摘要： A device is provided that includes a battery layer on a substrate, where a first battery cell is formed in the battery layer. The first battery cell includes a first anode, a first cathode, and a first electrolyte arranged between the first anode and the first cathode, where the first anode, the first cathode, and the first electrolyte are arranged in the battery layer such that perpendicular projections onto the substrate of each of the first anode and the first cathode are non-overlapping. A method of manufacturing such device is also provided. A system is also provide that includes such device for supplying power to an electronic device.
摘要翻译：提供了一种在基板上包括电池层的装置，其中第一电池单体形成在电池层中。第一电池单元包括第一阳极，第一阴极和布置在第一阳极和第一阴极之间的第一电解质，其中第一阳极，第一阴极和第一电解质布置在电池层中，使得垂直突起在第一阳极和第一阴极中的每一个的衬底上是不重叠的。还提供了制造这种装置的方法。还提供一种包括用于向电子设备供电的设备的系统。

4. 发明授权

US08330191B2 Intrusion protection using stress changes 有权
标题翻译：使用压力变化的入侵保护
公开(公告)号：US08330191B2
公开(公告)日：2012-12-11
申请号：US12997576
申请日：2009-05-26
申请人： Romano Hoofman , Remco Henricus Wilhelmus Pijnenburg , Youri Victorovitch Ponomarev
发明人： Romano Hoofman , Remco Henricus Wilhelmus Pijnenburg , Youri Victorovitch Ponomarev
IPC分类号： H01L29/84 , G08B13/14
CPC分类号： H01L23/576 , G06F21/87 , H01L2924/0002 , H01L2924/00
摘要： The invention relates to a integrated circuit comprising an electronic circuit integrated on a substrate (5), and further comprising protections means for protection of the electronic circuit (25). The protection means comprise: i) a first strained encapsulation layer (10) being provided on a first side of the substrate (5), wherein the first strained encapsulation layer (10) has a strain (S1) in a direction parallel to the substrate (5), and ii) disabling means (20) arranged for at least partially disabling the electronic circuit (25) under control of a strain change in the substrate (5). The invention further relates to a method of manufacturing such integrated circuit, and to a system comprising such integrated circuit. Such system is selected from a group comprising: a bank-card, a smart-card, a contact-less card and an RFID. All embodiments of the integrated circuit in accordance with the invention provide essentially an alternative tamper protection to the data stored or present in the electronic circuit therein. A first main group of embodiments concerns an integrated circuit wherein tamper protection is obtained by detecting a strain change during tampering and subsequently disabling the electronic circuit. A second main group of embodiments concerns an integrated circuit wherein tamper protection is obtained by designing a stack of strained encapsulation layers, such that tampering causes releasing of strain and thereby mechanical disintegrate (break, delaminate, etc) of the integrated circuit, and thus disabling the electronic circuit.
摘要翻译：本发明涉及一种集成电路，其包括集成在基板（5）上的电子电路，并且还包括用于保护电子电路（25）的保护装置。保护装置包括：i）第一应变封装层（10），设置在基板（5）的第一侧上，其中第一应变封装层（10）在平行于基板的方向上具有应变（S1）（5），以及ii）布置成在所述衬底（5）中的应变变化的控制下至少部分地禁用所述电子电路（25）的禁用装置（20）。本发明还涉及一种制造这种集成电路的方法，以及包括这种集成电路的系统。这样的系统从包括银行卡，智能卡，无接触卡和RFID的组中选择。根据本发明的集成电路的所有实施例基本上为存储或存在于其中的电子电路中的数据提供了替代的篡改保护。第一主要实施例涉及集成电路，其中通过在篡改期间检测应变变化并随后禁用电子电路来获得篡改保护。第二主要实施例涉及一种集成电路，其中通过设计应变封装层的堆叠来获得防篡改，使得篡改导致应变释放，从而导致集成电路的机械分解（破坏，分层等），从而导致无效电子电路。

5. 发明申请

US20100167130A1 ELECTROCHEMICAL ENERGY SOURCE AND ELECTRONIC DEVICE PROVIDED WITH SUCH AN ELECTROCHEMICAL ENERGY SOURCE 审中-公开
标题翻译：具有电化学能源的电化学能源和电子设备
公开(公告)号：US20100167130A1
公开(公告)日：2010-07-01
申请号：US12438041
申请日：2007-09-10
申请人： Remco Henricus Wilhelmus Pijnenburg , Petrus Henricus Laurentius Notten , Youri Victorovitch Ponomarev , Rogier Adrianus Henrica Niessen , Johannes Hubertus Gerardus Op Het Veld
发明人： Remco Henricus Wilhelmus Pijnenburg , Petrus Henricus Laurentius Notten , Youri Victorovitch Ponomarev , Rogier Adrianus Henrica Niessen , Johannes Hubertus Gerardus Op Het Veld
IPC分类号： H01M6/18
CPC分类号： H01M6/40 , H01M2/1066 , H01M10/0436 , H01M10/0585
摘要： The invention relates to an improved electrochemical energy source, comprising: a substrate, and at least one stack deposited onto said substrate, the stack comprising: an first electrode, a second electrode, and an intermediate solid-state electrolyte separating the first electrode and the second electrode. The invention also relates to an electronic device provided with such an electrochemical energy source.
摘要翻译：本发明涉及一种改进的电化学能源，包括：衬底和沉积在所述衬底上的至少一个堆叠，所述堆叠包括：第一电极，第二电极和中间固体电解质，其将第一电极和第二电极。本发明还涉及一种具有这种电化学能源的电子设备。

6. 发明申请

US20110089506A1 INTRUSION PROTECTION USING STRESS CHANGES 有权
标题翻译：使用压力变化的侵入保护
公开(公告)号：US20110089506A1
公开(公告)日：2011-04-21
申请号：US12997576
申请日：2009-05-26
申请人： Romano Hoofman , Remco Henricus Wilhelmus Pijnenburg , Youri Victorovitch Ponomarev
发明人： Romano Hoofman , Remco Henricus Wilhelmus Pijnenburg , Youri Victorovitch Ponomarev
IPC分类号： H01L29/84 , G06K19/073 , H01L21/56
CPC分类号： H01L23/576 , G06F21/87 , H01L2924/0002 , H01L2924/00
摘要： The invention relates to a integrated circuit comprising an electronic circuit integrated on a substrate (5), and further comprising protections means for protection of the electronic circuit (25). The protection means comprise: i) a first strained encapsulation layer (10) being provided on a first side of the substrate (5), wherein the first strained encapsulation layer (10) has a strain (S1) in a direction parallel to the substrate (5), and ii) disabling means (20) arranged for at least partially disabling the electronic circuit (25) under control of a strain change in the substrate (5). The invention further relates to a method of manufacturing such integrated circuit, and to a system comprising such integrated circuit. Such system is selected from a group comprising: a bank-card, a smart-card, a contact-less card and an RFID. All embodiments of the integrated circuit in accordance with the invention provide essentially an alternative tamper protection to the data stored or present in the electronic circuit therein. A first main group of embodiments concerns an integrated circuit wherein tamper protection is obtained by detecting a strain change during tampering and subsequently disabling the electronic circuit. A second main group of embodiments concerns an integrated circuit wherein tamper protection is obtained by designing a stack of strained encapsulation layers, such that tampering causes releasing of strain and thereby mechanical disintegrate (break, delaminate, etc) of the integrated circuit, and thus disabling the electronic circuit.
摘要翻译：本发明涉及一种集成电路，其包括集成在基板（5）上的电子电路，并且还包括用于保护电子电路（25）的保护装置。保护装置包括：i）第一应变封装层（10），设置在基板（5）的第一侧上，其中第一应变封装层（10）在平行于基板的方向上具有应变（S1）（5），以及ii）布置成在所述衬底（5）中的应变变化的控制下至少部分地禁用所述电子电路（25）的禁用装置（20）。本发明还涉及一种制造这种集成电路的方法，以及包括这种集成电路的系统。这样的系统从包括银行卡，智能卡，无接触卡和RFID的组中选择。根据本发明的集成电路的所有实施例基本上为存储或存在于其中的电子电路中的数据提供了替代的篡改保护。第一主要实施例涉及集成电路，其中通过在篡改期间检测应变变化并随后禁用电子电路来获得篡改保护。第二主要实施例涉及一种集成电路，其中通过设计应变封装层的堆叠来获得防篡改，使得篡改导致应变释放，从而导致集成电路的机械分解（破坏，分层等），从而导致无效电子电路。

7. 发明授权

US09546884B2 Sensor 有权
标题翻译：传感器
公开(公告)号：US09546884B2
公开(公告)日：2017-01-17
申请号：US12889832
申请日：2010-09-24
申请人： Roel Daamen , Aurelie Humbert , Matthias Merz , Youri Victorovitch Ponomarev
发明人： Roel Daamen , Aurelie Humbert , Matthias Merz , Youri Victorovitch Ponomarev
IPC分类号： G06K19/06 , G01D5/14
CPC分类号： G01D5/14 , H01L2224/11
摘要： A sensor comprising a silicon substrate having a first and a second surface, integrated circuitry provided on the first surface of the silicon substrate, and a sensor structure provided on the second surface of the silicon substrate. The sensor structure and the integrated circuitry are electrically coupled to each other.
摘要翻译：一种传感器，包括具有第一和第二表面的硅衬底，设置在硅衬底的第一表面上的集成电路以及设置在硅衬底的第二表面上的传感器结构。传感器结构和集成电路彼此电耦合。

8. 发明授权

US08988088B2 Liquid immersion sensor 有权
标题翻译：液浸传感器
公开(公告)号：US08988088B2
公开(公告)日：2015-03-24
申请号：US13510368
申请日：2010-11-29
申请人： Aurelie Humbert , Matthias Merz , Roel Daamen , Youri Victorovitch Ponomarev
发明人： Aurelie Humbert , Matthias Merz , Roel Daamen , Youri Victorovitch Ponomarev
IPC分类号： G01N27/04
CPC分类号： G01N27/041 , G01N27/048
摘要： Disclosed is a liquid immersion sensor comprising a substrate (10) carrying a conductive sensing element (20) and a corrosive agent (30) for corroding the conductive sensing element, said corrosive agent being immobilized in the vicinity of the conductive sensing element and being soluble in said liquid.
摘要翻译：公开了一种液浸传感器，其包括承载导电感测元件（20）的基底（10）和用于腐蚀导电感测元件的腐蚀剂（30），所述腐蚀剂固定在导电感测元件附近并且是可溶的在所述液体中。

9. 发明授权

US08801917B2 Electrochemical potentiometric sensing without reference electrode 有权
标题翻译：无参考电极的电化学电位传感
公开(公告)号：US08801917B2
公开(公告)日：2014-08-12
申请号：US13061110
申请日：2009-08-24
申请人： Matthias Merz , Youri Victorovitch Ponomarev , Gilberto Curatola
发明人： Matthias Merz , Youri Victorovitch Ponomarev , Gilberto Curatola
IPC分类号： G01N27/327
CPC分类号： G01N27/4148 , G01N27/4145
摘要： The invention relates to a method of determining a charged particle concentration in an analyte (100), the method comprising steps of: i) determining at least two measurement points of a surface-potential versus interface-temperature curve (c1, c2, c3, c4), wherein the interface temperature is obtained from a temperature difference between a first interface between a first ion-sensitive dielectric (Fsd) and the analyte (100) and a second interface between a second ion-sensitive dielectric (Ssd) and the analyte (100), and wherein the surface-potential is obtained from a potential difference between a first electrode (Fe) and a second electrode (Se) onto which said first ion-sensitive dielectric (Fsd) and said second ion-sensitive dielectric (Ssd) are respectively provided, And ii) calculating the charged particle concentration from locations of the at least two measurement points of said curve (c1, c2, c3, c4). This method, which still is a potentiometric electrochemical measurement, exploits the temperature dependency of a surface-potential of an ion-sensitive dielectric in an analyte. The invention further provides an electrochemical sensor for determining a charged particle concentration in an analyte. The invention also provides various sensors which can be used to determine the charged particle concentration, i.e. EGFET's and EIS capacitors.
摘要翻译：本发明涉及一种测定分析物（100）中带电粒子浓度的方法，所述方法包括以下步骤：i）确定表面电位对界面温度曲线（c1，c2，c3，c3）的至少两个测量点， c4），其中所述界面温度是由第一离子敏感电介质（Fsd）和分析物（100）之间的第一界面与第二离子敏感电介质（Ssd）与分析物之间的第二界面（100），并且其中所述表面电位由所述第一离子敏感电介质（Fsd）和所述第二离子敏感电介质（Ssd）上的第一电极（Fe）和第二电极（Se）之间的电位差获得，），和ii）从所述曲线（c1，c2，c3，c4）的至少两个测量点的位置计算带电粒子浓度。这种仍然是电位电化学测量的方法利用分析物中离子敏感电介质的表面电位的温度依赖性。本发明还提供了一种用于测定分析物中带电粒子浓度的电化学传感器。本发明还提供可用于确定带电粒子浓度的各种传感器，即EGFET和EIS电容器。

10. 发明授权

US09679857B2 Semiconductor device and method including an intertial mass element 有权
公开(公告)号：US09679857B2
公开(公告)日：2017-06-13
申请号：US15266809
申请日：2016-09-15
申请人： Matthias Merz , Youri Victorovitch Ponomarev , Mark van Dal
发明人： Matthias Merz , Youri Victorovitch Ponomarev , Mark van Dal
IPC分类号： H01L23/52 , B81C1/00 , B81B7/02 , G01P15/06 , H01L23/00 , B81C99/00 , B81B7/00 , H01L21/768 , H01L23/522 , H01L23/525 , H01L23/528 , G01P15/08
CPC分类号： H01L23/564 , B81B7/0006 , B81B2201/0235 , B81B2203/0315 , B81B2207/015 , B81C1/00246 , B81C99/005 , B81C2201/013 , B81C2203/0136 , B81C2203/0714 , G01P15/06 , G01P15/0802 , G01P2015/0862 , G01P2015/0877 , H01L21/768 , H01L23/5226 , H01L23/5256 , H01L23/528
摘要： Disclosed is a semiconductor device comprising a stack of patterned metal layers separated by dielectric layers, the stack comprising a first conductive support structure and a second conductive support structure and a cavity in which an inertial mass element comprising at least one metal portion is conductively coupled to the first support structure and the second support structure by respective conductive connection portions, at least one of said conductive connection portions being designed to break upon the inertial mass element being exposed to an acceleration force exceeding a threshold defined by the dimensions of the conductive connection portions. A method of manufacturing such a semiconductor device is also disclosed.

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