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1. 发明专利

JP2009260978A Method and apparatus for downconverting transmitted signals using plurality of modulation formats to common intermediate frequency range 审中-公开
标题翻译：用于将调制格式的多项式转换为通用中频范围的传输信号的方法和装置
公开(公告)号：JP2009260978A
公开(公告)日：2009-11-05
申请号：JP2009134921
申请日：2009-06-04
申请人： Qualcomm Inc , クゥアルコム・インコーポレイテッドQualcomm Incorporated
发明人： CICCARELLI STEVEN C , YOUNIS SAED G
IPC分类号： H04B1/26 , G01S19/07 , G01S19/11 , G01S19/12 , G01S19/31 , H04B1/38 , H04B1/40 , H04B1/62 , H04L27/22
CPC分类号： H04B1/0057 , H04B1/005 , H04B1/006 , H04B1/406
摘要： PROBLEM TO BE SOLVED: To provide a receiver design in a multiple mode telephone, which uses common hardwares for downconversion and sampling operation, and so is usable to minimize hardware components necessary for the multiple mode telephone.
SOLUTION: A receiver 2 which downconverts an input signal modulated by using first, second, third and fourth modulation formats, into a common intermediate frequency range. The input signal is supplied to first, second and third band selection filters 10, 12, 14 which select first, second and third frequency ranges, respectively. A first downconverter 20 is connected to an output of the first band selection filter and downconverts a signal from the first frequency range into the common intermediate frequency range.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：在多模式电话中提供接收机设计，其使用普通硬件进行下变频和采样操作，因此可用于最小化多模电话所需的硬件组件。解决方案：将通过使用第一，第二，第三和第四调制格式调制的输入信号下变频成公共中频范围的接收机2。输入信号被提供给分别选择第一，第二和第三频率范围的第一，第二和第三频带选择滤波器10,12,14。第一下变频器20连接到第一频带选择滤波器的输出，并将来自第一频率范围的信号下变频到公共中频范围。版权所有（C）2010，JPO＆INPIT

2. 发明专利

JP2012095321A Dynamic lna switch points based on channel conditions 审中-公开
标题翻译：基于通道条件的动态LNA切换点
公开(公告)号：JP2012095321A
公开(公告)日：2012-05-17
申请号：JP2011270591
申请日：2011-12-09
申请人： Qualcomm Inc , クゥアルコム・インコーポレイテッドQualcomm Incorporated
发明人： CICCARELLI STEVEN C , BRIAN GEORGE , LAU SOON SENG
IPC分类号： H04B1/10 , H04B1/16 , H04B1/26
CPC分类号： H04B1/109 , H03F3/72 , H03F2200/294 , H03F2203/7231 , H04K3/224 , H04W52/0238 , Y02D70/00 , Y02D70/1222 , Y02D70/40
摘要： PROBLEM TO BE SOLVED: To provide techniques for operating a receiver to achieve good linearity performance and higher receive signal to noise ratio.SOLUTION: The receiver includes one or more circuit blocks, e.g., a low noise amplifier (LNA), having discrete gain states. The gain states are selected based on switch points, with each switch point indicating a specific received signal level for switching from one gain state to another gain state. The switch points may be dynamically selected based on channel conditions, which may be characterized by the presence or absence or intensity or frequency of radio interference. A first set of switch points may be selected when radio interference is detected, and a second set of switch points may be selected when radio interference is not detected. The gain states are selected in accordance with the set of switch points selected for use.
摘要翻译：要解决的问题：提供操作接收机以获得良好的线性性能和更高的接收信噪比的技术。解决方案：接收机包括一个或多个具有离散增益状态的电路块，例如低噪声放大器（LNA）。根据切换点选择增益状态，每个开关点表示用于从一个增益状态切换到另一个增益状态的特定接收信号电平。可以基于信道条件动态地选择切换点，其可以由无线电干扰的存在或不存在或强度或频率来表征。当检测到无线电干扰时可以选择第一组切换点，并且当检测到无线电干扰时可以选择第二组切换点。增益状态根据选择使用的开关点集合进行选择。版权所有（C）2012，JPO＆INPIT

3. 发明专利

JP2009153151A Amps receiver system using zero-if architecture 审中-公开
标题翻译：使用零中频架构的AMPS接收机系统
公开(公告)号：JP2009153151A
公开(公告)日：2009-07-09
申请号：JP2009006845
申请日：2009-01-15
申请人： Qualcomm Inc , クゥアルコム・インコーポレイテッドQualcomm Incorporated
发明人： CICCARELLI STEVEN C , RAGHUPATHY ARUN
IPC分类号： H03G3/20 , H03D1/22 , H03G3/30 , H04B1/30
CPC分类号： H04B1/406 , H03G3/3068 , H04B1/0003 , H04B1/30
摘要： PROBLEM TO BE SOLVED: To provide a receiver that can share the CDMA and AMPS by including the digital AGC to reduce the number of parts, manufacturing cost and circuit space.
SOLUTION: An AMPS receiver system, utilizing a ZIF architecture and processing received forward link signals in the digital domain, includes: a direct converter 110 including a low noise amplifier 112; high dynamic A/D converters 120, 130; a phase shifter 160; a digital FM demodulator 180; an accumulator 185; and a controller 190. The controller 190 adjusts the gains of the low noise amplifier 112 and a digital VGA 170 based on the average power of the signal output by the digital VGA 170.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种可以通过包括数字AGC来减少部件数量，制造成本和电路空间来共享CDMA和AMPS的接收机。解决方案：利用ZIF架构并在数字域中处理接收的前向链路信号的AMPS接收机系统包括：包括低噪声放大器112的直接转换器110; 高动态A / D转换器120,130; 移相器160; 数字FM解调器180; 蓄能器185; 和控制器190.控制器190基于由数字VGA 170输出的信号的平均功率来调整低噪声放大器112和数字VGA 170的增益。版权所有（C）2009，JPO＆INPIT

4. 发明专利

JP2008219922A Programmable linear receiver 有权
标题翻译：可编程线性接收器
公开(公告)号：JP2008219922A
公开(公告)日：2008-09-18
申请号：JP2008096328
申请日：2008-04-02
申请人： Qualcomm Inc , クゥアルコム・インコーポレイテッドQualcomm Incorporated
发明人： CICCARELLI STEVEN C , YOUNIS SAED G , KAUFMAN RALPH E
IPC分类号： H04B1/16 , H03F1/02 , H03F1/34 , H03G1/00 , H03G3/18 , H03G3/20 , H04B1/10
CPC分类号： H03G3/3068 , H03F1/0261 , H03F1/342 , H03F2200/294 , H03F2200/331 , H03F2200/372 , H03G1/0088 , H04B1/1027 , H04B1/109
摘要： PROBLEM TO BE SOLVED: To provide the requisite level of performance while minimizing power consumption.
SOLUTION: Power consumption is minimized on the basis of the measurement of non-linearity in an output signal from a receiver 1,200. The amount of the non-linearity can be measured by an RSSI slope or an energy-per-chip-to-noise-ratio Ec/Io value. The RSSI slope is the ratio of a change in the output signal plus intermodulation to a change in an input signal. The input signal level is periodically increased by a prescribed level and the output signal from the receiver 1,200 is measured. The output signal comprises a desired signal and intermodulation products from the non-linearity within the receiver 1200. When the receiver 1,200 is operating linearly, the output signal level increases dB per dB with the input signal level. However, when the receiver 1,200 enters into a non-linear region, intermodulation products caused by a non-linearity increase faster than the desired signal. By detecting the RSSI slope, the amount of degradation caused by the non-linearity can be determined. This information is then used to adjust the IIP3 operating point of an amplifier 1,234 and a mixer.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供必要的性能水平，同时最大限度地降低功耗。解决方案：基于来自接收机1200的输出信号中的非线性的测量，使功耗最小化。非线性的量可以通过RSSI斜率或每芯片上的能量/比率Ec / Io值来测量。 RSSI斜率是输出信号加互调变化与输入信号变化的比率。输入信号电平周期性地增加规定电平，测量来自接收机1,200的输出信号。输出信号包括期望的信号和来自接收器1200内的非线性的互调产物。当接收器1,200线性运行时，输出信号电平随着输入信号电平而增加每dB dB。然而，当接收机1,200进入非线性区域时，由非线性引起的互调产物比期望的信号增加更快。通过检测RSSI斜率，可以确定由非线性引起的劣化量。然后，该信息用于调整放大器1,234和混频器的IIP3工作点。版权所有（C）2008，JPO＆INPIT

5. 发明专利

CA2313139C RECEIVER WITH SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER 未知
公开(公告)号：CA2313139C
公开(公告)日：2009-12-15
申请号：CA2313139
申请日：1998-12-08
申请人： QUALCOMM INC
发明人： YOUNIS SAED G , BUTTERFIELD DANIEL K , BAZARJANI SEYFOLLAH S , CICCARELLI STEVEN C
IPC分类号： H03M1/66 , H04B1/16 , H03D3/00 , H03D7/16 , H03M1/12 , H03M3/02 , H04B1/26
摘要： A receiver comprising a sigma-delta analog-to-digital converter (.SIGMA..DELTA. ADC) can be utilized in one of four configurations, as a subsampling bandpass receiver, a subsampling baseband receiver, a Nyquist sampling bandpass receiver, or a Nyquist sampling baseband receiver. For subsampling .SIGMA..DELTA. receivers, the sampling frequency i s less than twice the center frequency of the input signal into the .SIGMA..DELTA. ADC. For Nyquist sampling .SIGMA..DELTA. receivers, the sampling frequency i s at least twice the highest frequency of the input signal into the .SIGMA..DELTA. ADC. For baseband .SIGMA..DELTA. receivers, the center frequency of the outp ut signal from the .SIGMA..DELTA. ADC is approximately zero or DC. For bandpass .SIGMA..DELTA. receivers, the center frequency of the output signal from the .SIGMA..DELTA. ADC is greater than zero. The sampling frequency can be selected based on the bandwidth of the input signal to simplify the design of the digital circuits used to process the output samples from the .SIGMA..DELTA. ADC. Furthermore, the center frequency of the input signal can be selected based on the sampling frequency and the bandwidth of the input signal. The .SIGMA..DELTA. ADC within the receiver provides many benefits.

6. 发明专利

CA2321582C METHOD AND APPARATUS FOR DOWNCONVERTING SIGNALS TRANSMITTED USING A PLURALITY OF MODULATION FORMATS TO A COMMON INTERMEDIATE FREQUENCY RANGE 未知
公开(公告)号：CA2321582C
公开(公告)日：2009-11-17
申请号：CA2321582
申请日：1999-03-02
申请人： QUALCOMM INC
发明人： CICCARELLI STEVEN C , YOUNIS SAED G
IPC分类号： H04B1/40 , G01S19/07 , G01S19/11 , G01S19/12 , G01S19/31 , H04B1/26 , H04B1/38 , H04B1/62 , H04L27/22
摘要： A receiver (2) that down-converts input signals modu-lated using first, second, third and fourth modulation formats to a common intermediate fre-quency range. The first and second modulation formats are transmitted to the receiver in a first frequency range, the third modulation format is transmit-ted to the receiver in a second frequency range, and the fourth modulation format is transmit-ted to the recdeiver in a third frequency range. The input sig-nals are provided to first, sec-ond and third band selection fil-ters (10, 12, 14) that respec-tively select first, second and third frequency ranges. A first downconverter (20) is coupled to an output of the first band se-lection filter, and downconverts signals from the first frequency range to the common intermediate frequency range. A second downconverter (24) is selectively coupled by a switch (16) to either an output of the second band selection filter (12) o r an output of the third band selection filter (14), and downconverts signals from either the second frequency range or the third frequency range to the common intermediate frequency range. The second downconverter has an input coupled to a frequency doubling circuit (26). Switching circuitry (28) selectively couples one of either a first oscillating signal (30) from avoltage controlled oscillator (VCO) (34) havin g a VCO frequency range or a second oscillating signal (32) at a second frequency that is outside the VCO frequency range to an input of the first downconverter (20) and an input of the frequency doubling circuit (26).

7. 发明专利

DE69839192D1 未知
公开(公告)号：DE69839192D1
公开(公告)日：2008-04-10
申请号：DE69839192
申请日：1998-12-08
申请人： QUALCOMM INC
发明人： BAZARJANI SEYFOLLAH S , CICCARELLI STEVEN C , YOUNIS SAED G , BUTTERFIELD DANIEL K
IPC分类号： H03M1/66 , H04B1/16 , H03D3/00 , H03D7/16 , H03M3/02 , H04B1/26
摘要： A receiver comprising a sigma-delta analog-to-digital converter ( SIGMA DELTA ADC) can be utilized in one of four configurations, as a subsampling bandpass receiver, a subsampling baseband receiver, a Nyquist sampling bandpass receiver, or a Nyquist sampling baseband receiver. For subsampling SIGMA DELTA receivers, the sampling frequency is less than twice the center frequency of the input signal into the SIGMA DELTA ADC. For Nyquist sampling SIGMA DELTA receivers, the sampling frequency is at least twice the highest frequency of the input signal into the SIGMA DELTA ADC. For baseband SIGMA DELTA receivers, the center frequency of the output signal from the SIGMA DELTA ADC is approximately zero or DC. For bandpass SIGMA DELTA receivers, the center frequency of the output signal from the SIGMA DELTA ADC is greater than zero. The sampling frequency can be selected based on the bandwidth of the input signal to simplify the design of the digital circuits used to process the output samples from the SIGMA DELTA ADC. Furthermore, the center frequency of the input signal can be selected based on the sampling frequency and the bandwidth of the input signal. The SIGMA DELTA ADC within the receiver provides many benefits.

8. 发明专利

AU2003209333A1 System and method for i-q mismatch compensation in a low if or zero if receiver 未知
公开(公告)号：AU2003209333A1
公开(公告)日：2003-09-02
申请号：AU2003209333
申请日：2003-01-22
申请人： QUALCOMM INC
发明人： CICCARELLI STEVEN C , REEVES ROBERT , RAGHUPATHY ARUN
IPC分类号： H03D3/00 , H04B1/30 , H04L27/00

9. 发明专利

AU743320B2 Programmable dynamic range receiver 未知
公开(公告)号：AU743320B2
公开(公告)日：2002-01-24
申请号：AU1633099
申请日：1998-12-08
申请人： QUALCOMM INC
发明人： YOUNIS SAED G , BAZARJANI SEYFOLLAH S , CICCARELLI STEVEN C
IPC分类号： H03M1/18 , H03M3/02 , H04B1/10 , H04B1/16
摘要： A programmable dynamic range receiver which provides the requisite level of performance at reduced power consumption. The SIGMA DELTA ADC within the receiver is designed with one or more loops. Each loop provides a predetermined dynamic range performance. The loops can be enabled or disabled based on the required dynamic range and a set of dynamic range thresholds. The SIGMA DELTA ADC is also designed with adjustable bias current. The dynamic range of the SIGMA DELTA ADC varies approximately proportional to the bias current. By adjusting the bias current, the required dynamic range can be provided by the SIGMA DELTA ADC with minimal power consumption. A reference voltage of the SIGMA DELTA ADC can be descreased when high dynamic range is not required, thereby allowing for less bias current in the SIGMA DELTA ADC and supporting circuitry. The dynamic range of the SIGMA DELTA ADC is a also function of the oversampling ratio which is proportional to the sampling frequency. High dynamic range requires a high oversampling ratio. When high dynamic range is not required, the sampling frequency can be lowered.

10. 发明专利

CA2313139A1 RECEIVER WITH SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER 未知
公开(公告)号：CA2313139A1
公开(公告)日：1999-06-17
申请号：CA2313139
申请日：1998-12-08
申请人： QUALCOMM INC
发明人： BAZARJANI SEYFOLLAH S , CICCARELLI STEVEN C , YOUNIS SAED G , BUTTERFIELD DANIEL K
IPC分类号： H03M1/66 , H03D3/00 , H03D7/16 , H03M3/02 , H04B1/26 , H04B1/16
摘要： A receiver comprising a sigma-delta analog-to-digital converter(.SIGMA..DELTA. ADC) can be utilized in one of four configurations, as a subsampling bandpass receiver, a subsampling baseband receiver, a Nyquist sampling bandpass receiver, or a Nyquist sampling baseband receiver. For subsampling .SIGMA..DELTA. receivers, the sampling frequency is less than twice the center frequency of the input signal into the .SIGMA..DELTA. ADC. For Nyquist sampling .SIGMA..DELTA. receivers, the sampling frequency is at least twice the highest frequency of the input signal into the .SIGMA..DELTA. ADC. For baseband .SIGMA..DELTA. receivers, the center frequency of the output signal from the .SIGMA..DELTA. ADC is approximately zero or DC. For bandpass .SIGMA..DELTA. receivers, the center frequency of the output signal from the .SIGMA..DELTA. ADC is greater than zero. The sampling frequency can be selected based on the bandwidth of the input signal to simplify the design of the digital circuits used to process the output samples from the .SIGMA..DELTA. ADC. Furthermore, the center frequency of the input signal can be selected based on the sampling frequency and the bandwidth of the input signal. The .SIGMA..DELTA. ADC within the receiver provides many benefits.

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