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1. 发明专利

JP2015019349A 信号変調回路有权
标题翻译：信号调制电路
公开(公告)号：JP2015019349A
公开(公告)日：2015-01-29
申请号：JP2014009841
申请日：2014-01-22
申请人：オンキヨー株式会社 , Onkyo Corp
发明人： NAKANISHI YOSHINORI , KAWAGUCHI TAKESHI , SEKIYA MAMORU
IPC分类号： H03M3/02
CPC分类号： H03M3/37 , G11B20/10009 , G11B2020/00065 , H03M3/30 , H03M3/346 , H03M3/348 , H03M3/424 , H04R3/00
摘要：【課題】出力の状態をリアルタイムで補正することができるとともに、確実に入力信号を変調して出力することができる変調回路を提供する。【解決手段】信号変調回路は、減算器16と、積分器20と、チョッパ回路22と、分周器24と、D型フリップフロップ26を備える。シグマデルタ変調回路の遅延回路を帰還回路に設けず、D型フリップフロップ26で遅延させて量子化する。チョッパ回路22によりクロック信号に同期したタイミングでゼロレベルを挿入して、パルス密度変調を行う。【選択図】図2
摘要翻译：要解决的问题：提供一种实时校正输出状态并可靠地调制并输出输入信号的调制电路。解决方案：信号调制电路包括减法器16，积分器20，斩波电路22，分频器 24和D触发器26.Σ-Δ调制电路的延迟电路不设置在反馈电路中，而D触发器26提供延迟和量化。斩波电路22在与时钟信号同步的定时插入零电平以执行脉冲密度调制。

2. 发明专利

JP2013157818A Mute control circuit and pulse width modulation circuit 审中-公开
标题翻译：静音控制电路和脉冲宽度调制电路
公开(公告)号：JP2013157818A
公开(公告)日：2013-08-15
申请号：JP2012017288
申请日：2012-01-30
申请人： Onkyo Corp , オンキヨー株式会社
发明人： NAKANISHI YOSHINORI , UMETSU NORIO , MINAGAWA ATSUSHI
IPC分类号： H03F1/00 , H03F3/217 , H03K7/08
摘要： PROBLEM TO BE SOLVED: To execute a mute process instantly at a transition from a power-on state to a power-off state, and prevent the mute process from being executed upon an input supply voltage drop in the power-on state.SOLUTION: In a power-on state, a resistance R17 and a transistor Q11 are directly connected without the intervention of a Zener diode D13. Even if an input supply voltage drops in the power-on state, transistors Q12, Q13 remain on to keep a mute control signal for executing a mute process from being output. At a transition from the power-on state to a power-off state, the resistance R17 and the transistor Q11 are connected via the Zener diode D13. An input supply voltage drop can then cause the Zener diode D13 to draw a current to the resistance R17 to instantly control the transistors Q12, Q13 to an off state and instantly output the mute control signal for executing the mute process.
摘要翻译：要解决的问题：在从通电状态到断电状态的转变时立即执行静音处理，并且防止在通电状态下的输入电源电压下降执行静音处理。解决方案：在通电状态下，电阻R17和晶体管Q11直接连接而不需要齐纳二极管D13的介入。即使输入电源电压在通电状态下降，晶体管Q12，Q13保持导通，以保持静音控制信号，以执行静音处理。在从上电状态转换到断电状态时，电阻R17和晶体管Q11经由齐纳二极管D13连接。然后，输入电源电压降可以使齐纳二极管D13向电阻R17引出电流，以立即将晶体管Q12，Q13控制为截止状态，并立即输出用于执行静音处理的静音控制信号。

3. 发明专利

JP2008109650A Switching amplifier 审中-公开
标题翻译：开关放大器
公开(公告)号：JP2008109650A
公开(公告)日：2008-05-08
申请号：JP2007252745
申请日：2007-09-27
申请人： Onkyo Corp , オンキヨー株式会社
发明人： NAKANISHI YOSHINORI , HIDA KAZUHIRO
IPC分类号： H03F3/217 , H03F1/32 , H03F1/34
摘要： PROBLEM TO BE SOLVED: To provide a switching amplifier capable of performing correction to cancel a noise component with respect to a differential current to be inputted to a pulse width modulating means even concerning the switching amplifier using a current output type D/A converter for the generation of the differential current.
SOLUTION: The switching amplifier comprises: the D/A converter for converting a digital signal into a first electric current and a second electric current; the pulse width modulating means for outputting a PWM signal, based on the first and second electric currents; an amplifier means; and a negative feedback means for performing negative feedback in the first and second electric currents. The negative feedback means comprises: an attenuating means for attenuating the output signal of the amplifier means by a prescribed amount of feedback and outputting the signal as a negative feedback signal; a first correcting means for converting the negative feedback signal into an electric current from a voltage, generating a first correction signal, and correcting the first electric current, based on the first correction signal; and a second correcting means for converting the negative feedback signal into the electric current from the voltage, generating a second correction signal, and correcting the second electric current, based on the second correction signal.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：即使涉及使用电流输出类型D / A的开关放大器，也可以提供能够执行校正以抵消要输入到脉冲宽度调制装置的差分电流的噪声分量的开关放大器转换器用于产生差动电流。解决方案：开关放大器包括：D / A转换器，用于将数字信号转换为第一电流和第二电流; 脉冲宽度调制装置，用于基于第一和第二电流输出PWM信号; 放大器装置; 以及用于在第一和第二电流中执行负反馈的负反馈装置。负反馈装置包括：衰减装置，用于衰减放大器装置的输出信号预定量的反馈并输出该信号作为负反馈信号; 第一校正装置，用于根据第一校正信号将负反馈信号从电压转换成电流，产生第一校正信号和校正第一电流; 以及第二校正装置，用于根据第二校正信号将负反馈信号从电压转换成电流，产生第二校正信号和校正第二电流。版权所有（C）2008，JPO＆INPIT

4. 发明专利

JP2012244201A Switching amplifier 有权
标题翻译：开关放大器
公开(公告)号：JP2012244201A
公开(公告)日：2012-12-10
申请号：JP2011108935
申请日：2011-05-16
申请人： Onkyo Corp , オンキヨー株式会社
发明人： ASAO TSUYOSHI , NAKANISHI YOSHINORI
IPC分类号： H03F3/217 , H03K7/08 , H03K17/00 , H03K17/687
CPC分类号： H03F3/217
摘要： PROBLEM TO BE SOLVED: To solve the problem that both inputs to two output elements become a high level to disable a start of operation at a later transition into a power-on state.SOLUTION: When a switching amplifier 10 transitions into a power-off state, power control means 16 now having a switch SW turned off forcibly discharges a capacitor C102 to forcibly lower a reference potential V3 relative to a second supply voltage V2. Since a logic supply voltage Vdd relative to the reference potential V3 lowers the same as the reference potential V3, the logic supply voltage Vdd is fixed from a viewpoint of the reference potential V3. A constant current circuit reduces a constant current I to reduce a first current I1 and a second current I2 according as the reference potential V3 relative to the second supply voltage V2 lowers. The first current I1 and the second current I2 can be reduced before the logic supply voltage Vdd from the viewpoint of the reference potential V3 lowers to thus end the operation of pulse generation means in a normal state.
摘要翻译：要解决的问题：为了解决两个输出元件的两个输入变为高电平以在稍后转换到通电状态时禁止开始操作的问题。解决方案：当开关放大器10转换到断电状态时，断开开关SW的功率控制装置16强制地放电电容器C102，以相对于第二电源电压V2强制降低参考电位V3。由于相对于参考电位V3的逻辑电源电压Vdd与参考电位V3相同，因此从参考电位V3的角度来看，逻辑电源电压Vdd是固定的。恒定电流电路根据相对于第二电源电压V2的参考电位V3降低恒定电流I以减小第一电流I1和第二电流I2。在从参考电位V3的角度看，逻辑电源电压Vdd下降之前，可以减小第一电流I1和第二电流I2，从而在正常状态下结束脉冲发生装置的操作。版权所有（C）2013，JPO＆INPIT

5. 发明专利

JP2009141408A Pulse width modulation circuit, and switching amplifier using the same 有权
标题翻译：脉冲宽度调制电路和使用其的开关放大器
公开(公告)号：JP2009141408A
公开(公告)日：2009-06-25
申请号：JP2007312386
申请日：2007-12-03
申请人： Onkyo Corp , オンキヨー株式会社
发明人： NAKANISHI YOSHINORI , SEKIYA MAMORU
IPC分类号： H03K7/08 , H03F3/217 , H03K3/017 , H03K5/00 , H03M1/82
CPC分类号： H03F3/217
摘要： PROBLEM TO BE SOLVED: To stabilize the responsiveness of a pulse width modulation signal when the amplitude of an audio signal becomes excessive to a negative side.
SOLUTION: A first capacitor C1 is charged in the former half period in each period of a reference clock MCLK, and the first capacitor C1 is discharged in the latter half period. A first RS flip-flop circuit 17 generates a pulse signal with a discharge period when the voltage of the first capacitor C1 drops from voltage at the end of charging down to a prescribed threshold voltage Vth in each discharge period as a pulse width. A second capacitor C2 also performs charging and discharging operations identical to that of the first capacitor C1 to generate an identical pulse signal. A signal output circuit 19 combines pulse signals from the first and second RS flip-flop circuits 17 and 18 to generate a pulse width modulation signal PWMout. A charge current generation circuit 14 adds auxiliary current Imin to current obtained by performing voltage-current conversion of an audio signal to make limitation so as to prevent the amplitude of the audio signal from being excessive to a negative side.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：当音频信号的幅度变得过大到负侧时，稳定脉宽调制信号的响应性。解决方案：在参考时钟MCLK的每个周期中，在前一半周期中对第一电容器C1进行充电，并且在后半个周期中第一电容器C1被放电。第一RS触发器电路17产生具有放电周期的脉冲信号，该放电周期当第一电容器C1的电压从充电结束时的电压下降到每个放电周期中规定的阈值电压Vth作为脉冲宽度时。第二电容器C2还执行与第一电容器C1相同的充电和放电操作，以产生相同的脉冲信号。信号输出电路19组合来自第一和第二RS触发器电路17和18的脉冲信号，以产生脉冲宽度调制信号PWMout。充电电流产生电路14将辅助电流Imin加到通过执行音频信号的电压 - 电流转换而获得的电流以进行限制，以防止音频信号的幅度过大到负侧。版权所有（C）2009，JPO＆INPIT

6. 发明专利

JP2009065613A Pulse width modulation circuit, and switching amplifier using the same 有权
标题翻译：脉冲宽度调制电路和使用其的开关放大器
公开(公告)号：JP2009065613A
公开(公告)日：2009-03-26
申请号：JP2007233946
申请日：2007-09-10
申请人： Onkyo Corp , オンキヨー株式会社
发明人： NAKANISHI YOSHINORI , SEKIYA MAMORU
IPC分类号： H03K7/08 , H03F3/217
CPC分类号： H03K7/08 , H03F3/217
摘要： PROBLEM TO BE SOLVED: To achieve miniaturization of a circuit and reduction of part cost.
SOLUTION: This pulse width modulation circuit 1 includes: changing the voltage in a charging circuit 13 on the basis of an input signal voltage synchronously with a first switching signal ϕ1; changing the voltage reversely to the direction of voltage change in a first period on the basis of the predetermined bias current in a second period subsequent to the first period when the voltage in the charging circuit 13 changes; detecting a time from the start of the second period to the arrival of a voltage of the charging circuit 13 to a predetermined reference voltage Vth; and generating a pulse signal having the pulse width of a detection time on the basis of this detection time repeatedly outputted every time the first switching signal ϕ1 is outputted.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：实现电路的小型化和部件成本的降低。解决方案：该脉冲宽度调制电路1包括：基于与第一开关信号φ1同步的输入信号电压来改变充电电路13中的电压; 基于充电电路13中的电压变化的第一时段之后的第二周期中的预定偏置电流，在第一时段内将电压反向改变为电压变化的方向; 检测从第二周期开始到充电电路13的电压到达预定参考电压Vth的时间; 并且每当输出第一切换信号φ1时，根据该检测时间生成具有检测时间的脉冲宽度的脉冲信号。版权所有（C）2009，JPO＆INPIT

7. 发明专利

JP2009065612A Pulse width modulation circuit, and switching amplifier using the same 有权
标题翻译：脉冲宽度调制电路和使用其的开关放大器
公开(公告)号：JP2009065612A
公开(公告)日：2009-03-26
申请号：JP2007233945
申请日：2007-09-10
申请人： Onkyo Corp , オンキヨー株式会社
发明人： NAKANISHI YOSHINORI
IPC分类号： H03K7/08
摘要： PROBLEM TO BE SOLVED: To provide a pulse width modulation circuit capable of outputting proper pulse width modulated signals even when a comparing circuit having hysteresis characteristics is used.
SOLUTION: The pulse width modulation circuit 1 is provided with: a first integrator circuit C1 which is charged in a first period T1 as the half period of a predetermined clock signal on the basis of a current based on an audio input signal (es), and discharged with the accumulated charging voltage in a second period T2 on the basis of a predetermined bias current; a first comparing circuit 19 having hysteresis characteristics which detects a change in time of charging voltage of the first integrator circuit C1 after the start of the second period T2 by comparing the charging voltage of the first integrator circuit C1 to a predetermined threshold voltage; a first level shift circuit 17 which forcibly shifts the level of the charging voltage of the first integrator circuit C1 to a predetermined voltage level for a predetermined period; and a pulse signal generating circuit 23 which generates a pulse signal having the pulse width of a time repeatedly outputted alternately per half period of the clock signal from the first comparing circuit 19 on the basis of the time.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：即使当使用具有滞后特性的比较电路时，提供能够输出适当的脉宽调制信号的脉宽调制电路。解决方案：脉冲宽度调制电路1具有第一积分电路C1，该第一积分电路C1基于基于音频输入信号的电流在第一周期T1中作为预定时钟信号的半周期充电（并且在第二时段T2中基于预定偏置电流以累积充电电压放电; 具有滞后特性的第一比较电路19，其通过将第一积分电路C1的充电电压与预定阈值电压进行比较来检测第二时段T2开始之后的第一积分电路C1的充电电压的时间变化; 第一电平移位电路17，将第一积分电路C1的充电电压的电平强制转换到预定的电压电平一段预定的时间; 以及脉冲信号发生电路23，其基于时间生成具有从第一比较电路19的时钟信号的每半个周期交替重复输出的时间的脉冲宽度的脉冲信号。版权所有（C）2009，JPO＆INPIT

8. 发明专利

JP2014131110A Pulse width modulation circuit and switching amplifier 有权
标题翻译：脉冲宽度调制电路和开关放大器
公开(公告)号：JP2014131110A
公开(公告)日：2014-07-10
申请号：JP2012286699
申请日：2012-12-28
申请人： Onkyo Corp , オンキヨー株式会社
发明人： NAKANISHI YOSHINORI , SEKIYA MAMORU
IPC分类号： H03K7/06 , H02M7/48 , H03F3/217
CPC分类号： H03F3/217 , H03K5/04
摘要： PROBLEM TO BE SOLVED: To generate a pulse width modulation signal having fewer distortion components and independent of common mode noise and an offset voltage.SOLUTION: The operation of charging an integration circuit 3 with a current i=I+Δi (Δi=G*|e|) for a predetermined time t and subsequently discharging it at a constant current and the operation of charging an integration circuit 4 with a current i=I-Δi for the time t and subsequently discharging it at the constant current are alternately performed at a period 2*t with a shift of the time t therebetween. Pulse signal generation circuits 6, 7 generate pulse signals S1, S2 of pulse widths equivalent to discharge times t1, t2 of the integration circuits 3, 4, respectively, and a PWM signal generation circuit 8 detects discharge end timings of the integration circuits 3, 4 on the basis of the pulse signals S1, S2, and generates a pulse of a pulse width equivalent to a time from the discharge end timing of the integration circuit 4 to the discharge end timing of the integration circuit 3 and outputs it as a PWM signal S.
摘要翻译：要解决的问题：产生具有较少失真分量且与共模噪声和偏移电压无关的脉宽调制信号。解决方案：用电流i = I +＆Dgr; i（＆Dgr; i）对积分电路3充电的操作。 i = G * | e |），并且随后以恒定电流放电，并且对电流i = I-＆Dgr; i对积分电路4进行时间t的充电的操作，然后在在它们之间的时间t的偏移的情况下，以2 * t的周期交替地执行恒定电流。脉冲信号生成电路6,7分别产生与积分电路3,4的放电时间t1，t2相等的脉冲宽度的脉冲信号S1，S2，PWM信号生成电路8检测积分电路3的放电结束定时， 4，根据脉冲信号S1，S2，生成与积分电路4的放电结束时刻相对于积分电路3的放电结束时刻的时间相当的脉冲宽度的脉冲，作为PWM输出信号S.

9. 发明专利

JP2013115672A Pulse width modulation circuit and switching amplifier 审中-公开
标题翻译：脉冲宽度调制电路和开关放大器
公开(公告)号：JP2013115672A
公开(公告)日：2013-06-10
申请号：JP2011261123
申请日：2011-11-30
申请人： Onkyo Corp , オンキヨー株式会社
发明人： NAKANISHI YOSHINORI , MINAGAWA ATSUSHI , UMETSU NORIO
IPC分类号： H03K7/08 , H03F3/217
摘要： PROBLEM TO BE SOLVED: To provide a pulse width modulation circuit that can solve the problem in which, at a transition to a power-off state, leakage currents charging storage means bring both inputs of two output elements to a high level and both outputs thereof to a low level to disable a pulse width modulation operation from starting up at a subsequent transition to a power-on state, and that can output pulse width modulation signals accurately corresponding to an input signal.SOLUTION: A pulse width modulation circuit 20 includes switch means Q4 that, at a transition from a power-on state to a power-off state, is controlled to an on state to instantaneously discharge a supply voltage VB causative of leakage currents to a ground potential until it becomes 0 V. The switch means Q4 is connected to each cathode side of diodes D1, D2, and is electrically isolated from capacitors C1, C2 when currents I1, I2 charge the capacitors C1, C2 to keep from causing errors in charging C1, C2.
摘要翻译：要解决的问题：为了提供一种脉冲宽度调制电路，其能够解决在向断电状态的转变时，泄漏电流充电存储装置将两个输出元件的两个输入均为高电平的问题，以及其两个输出为低电平，以禁止脉冲宽度调制操作在随后转换到通电状态时启动，并且可以输出与输入信号准确对应的脉宽调制信号。解决方案：脉冲宽度调制电路20包括开关装置Q4，其在从通电状态到断电状态的转变被控制为导通状态以瞬时放电导致漏电流的电源电压VB 开关装置Q4连接到二极管D1，D2的每个阴极侧，并且当电流I1，I2对电容器C1，C2进行充电以保持不产生时，与电容器C1，C2电隔离 C1，C2充电错误。版权所有（C）2013，JPO＆INPIT

10. 发明专利

JP2012217118A Pulse-width modulation circuit and switching amplifier 审中-公开
标题翻译：脉冲宽度调制电路和开关放大器
公开(公告)号：JP2012217118A
公开(公告)日：2012-11-08
申请号：JP2011108933
申请日：2011-05-16
申请人： Onkyo Corp , オンキヨー株式会社
发明人： NAKANISHI YOSHINORI , SAKAI SHINICHI
IPC分类号： H03K7/08 , H03F3/217 , H03K4/06
摘要： PROBLEM TO BE SOLVED: To stabilize the response of a pulse-width modulation signal when an amplitude of an audio signal becomes excessive at a negative side.SOLUTION: A pulse-width modulation circuit 10 comprises: a clock generation circuit 11; a differential amplifier circuit 12; a first charge-current generation circuit 13; a second charge-current generation circuit 14; switches SW1 to SW4; capacitors C1 and C2; a first discharge constant-current circuit 15; a second discharge constant-current circuit 16; a first pulse generation circuit 17; a second pulse generation circuit 18; a pulse synthesis circuit 19; and a charge start voltage maintaining circuit 20. The charge start voltage maintaining circuit 20 prevents that charge start voltages of the capacitors C1 and C2 are lower than a voltage Va by supplying a power supply voltage to the capacitors C1 and C2 when the voltages of the capacitors C1 and C2 are almost lower than the voltage Va due to discharge operation by a constant current Id.
摘要翻译：要解决的问题：当音频信号的幅度在负侧变得过大时，稳定脉冲宽度调制信号的响应。脉冲宽度调制电路10包括：时钟发生电路11; 差分放大电路12; 第一充电电流产生电路13; 第二充电电流产生电路14; 开关SW1至SW4; 电容器C1和C2; 第一放电恒流电路15; 第二放电恒流电路16; 第一脉冲发生电路17; 第二脉冲发生电路18; 脉冲合成电路19; 和充电起始电压维持电路20.充电起始电压保持电路20通过向电容器C1和C2提供电源电压来防止电容器C1和C2的充电起始电压低于电压Va 由于恒定电流Id的放电操作，电容器C1和C2几乎低于电压Va。版权所有（C）2013，JPO＆INPIT

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