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1. 发明授权

US5332683A Method of manufacturing semiconductor device having elements isolated by trench 失效
标题翻译：制造具有由沟槽隔离的元件的半导体器件的方法
公开(公告)号：US5332683A
公开(公告)日：1994-07-26
申请号：US15672
申请日：1993-02-09
申请人： Naoto Miyashita , Koichi Takahashi , Hironori Sonobe
发明人： Naoto Miyashita , Koichi Takahashi , Hironori Sonobe
IPC分类号： H01L21/32 , H01L21/763 , H01L21/265 , H01L29/70
CPC分类号： H01L21/32 , H01L21/763
摘要： This invention relates to a method of manufacturing a semiconductor device having elements isolated by a trench. A trench is formed to surround an element region of a silicon substrate by anisotropic etching. A nonoxide film such as a silicon nitride film is selectively formed on the upper surface of the element region. Thermal oxidation is performed using the nonoxide film as a mask to form an oxide film on the inner face of the trench and the upper surface of a field region. Thereafter, a polysilicon layer is buried in the trench, and after the surface of the polysilicon layer is flattened, a capping oxide film is formed on the upper surface of the trench. In addition, a non-oxide film is formed to have an interval between the end of the nonoxide film and the trench of 2 .mu.m or more.
摘要翻译：本发明涉及一种制造半导体器件的方法，该半导体器件具有通过沟槽隔离的元件。通过各向异性蚀刻形成沟槽以包围硅衬底的元件区域。在元件区域的上表面上选择性地形成诸如氮化硅膜的非氧化物膜。使用非氧化物膜作为掩模进行热氧化，以在沟槽的内表面和场区的上表面上形成氧化膜。此后，多晶硅层被埋在沟槽中，并且在多晶硅层的表面变平时，在沟槽的上表面上形成覆盖氧化物膜。此外，形成非氧化物膜，其在非氧化物膜的端部和沟槽之间具有2μm以上的间隔。

2. 发明授权

US5111272A Semiconductor device having element regions electrically isolated from each other 失效
标题翻译：具有电子元件隔离的元件区域的半导体器件
公开(公告)号：US5111272A
公开(公告)日：1992-05-05
申请号：US651988
申请日：1991-02-07
申请人： Naoto Miyashita , Koichi Takahashi , Hironori Sonobe , Mitsutoshi Koyama
发明人： Naoto Miyashita , Koichi Takahashi , Hironori Sonobe , Mitsutoshi Koyama
IPC分类号： H01L29/73 , H01L21/331 , H01L21/76 , H01L21/762 , H01L21/8222 , H01L27/06 , H01L29/732
CPC分类号： H01L21/76264 , H01L21/76235 , H01L21/76286
摘要： A semiconductor device of this invention is characterized in that one element region is electrically isolated from another element region adjacent thereto by forming a groove surrounding the one element region and a distance between the groove surrounding one element region and a groove surrounding the another element region is set to be equal to or larger than 3 .mu.m.

3. 发明授权

US5127365A Vertical heat-treatment apparatus for semiconductor parts 失效
标题翻译：半导体零件立式热处理装置
公开(公告)号：US5127365A
公开(公告)日：1992-07-07
申请号：US659274
申请日：1991-02-22
申请人： Mitsutoshi Koyama , Koichi Takahashi , Hironori Sonobe
发明人： Mitsutoshi Koyama , Koichi Takahashi , Hironori Sonobe
IPC分类号： H01L21/205 , H01L21/00 , H01L21/22 , H01L21/31
CPC分类号： H01L21/67115
摘要： A heat-treatment apparatus includes a quartz heat-treatment tube having a vertically set axis in which a heat-treatment gas is supplied from its lower portion, and a quartz cap to be mounted on an upper opening portion of the heat-treatment tube. An opening is formed in a central portion of the cap, a quartz rod is inserted through the opening along the axis of the heat-treatment tube, and semiconductor parts to be heat-treated are held by the rod. A first exhaust duct is formed in a side surface of the heat-treatment tube at a position higher than at least the semiconductor parts held by the rod and exhausts the heat-treatment gas in the heat-treatment tube. A ring-like chamber open toward the inner surface of the cap is formed in the outer circumferential surface of the heat-treatment tube in a position close to the upper opening surface, and a second exhaust duct communicates with this chamber. The chamber communicates with the opening portion formed in the cap in the outer circumferential portion of the rod and communicates with the interior of the heat-treatment tube, thereby exhausting an external air drawn from the opening together with the heat-treatment gas in the heat-treatment tube.
摘要翻译：热处理装置包括：石英热处理管，其具有从其下部供给热处理气体的竖直设定轴;以及石英盖，安装在所述热处理管的上开口部。在盖的中央部形成有开口部，沿着热处理管的轴线将石英棒贯穿该开口部，通过该杆保持被热处理的半导体部件。第一排气管在热处理管的侧表面形成在比由杆保持的至少半导体部分高的位置，并排出热处理管中的热处理气体。在靠近上开口表面的位置，在热处理管的外周面上形成有朝向盖的内表面开口的环状室，第二排气管与该室连通。该室与杆的外周部形成的开口部连通，与热处理管的内部连通，从而将与开口一起从外部吸入的外部空气与热处理气体一起排出处理管。

4. 发明授权

US5683908A Method of fabricating trench isolation structure having tapered opening 失效
标题翻译：制造具有锥形开口的沟槽隔离结构的方法
公开(公告)号：US5683908A
公开(公告)日：1997-11-04
申请号：US705705
申请日：1996-08-30
申请人： Naoto Miyashita , Koichi Takahashi
发明人： Naoto Miyashita , Koichi Takahashi
IPC分类号： H01L21/306 , H01L21/308 , H01L21/762 , H01L21/76
CPC分类号： H01L21/3085 , H01L21/30604 , H01L21/30608 , H01L21/3083 , H01L21/76235 , Y10S438/978
摘要： A device-isolating trench having a taper at its upper portion is formed in a silicon semiconductor substrate. Then, a silicon oxide film is formed on the inner wall of the trench and the surface of the semiconductor substrate near the trench by an oxidizing method, and polycrystalline silicon is buried in the trench.
摘要翻译：在硅半导体衬底中形成在其上部具有锥形的器件隔离沟槽。然后，通过氧化法在沟槽的内壁和沟槽附近的半导体衬底的表面上形成氧化硅膜，并且将多晶硅埋入沟槽中。

5. 发明授权

US5434447A Semiconductor device having a trench for device isolation and method of fabricating the same 失效
标题翻译：具有用于器件隔离的沟槽的半导体器件及其制造方法
公开(公告)号：US5434447A
公开(公告)日：1995-07-18
申请号：US250110
申请日：1994-05-26
申请人： Naoto Miyashita , Koichi Takahashi
发明人： Naoto Miyashita , Koichi Takahashi
IPC分类号： H01L21/306 , H01L21/308 , H01L21/762 , H01L29/06
CPC分类号： H01L21/3085 , H01L21/30604 , H01L21/30608 , H01L21/3083 , H01L21/76235 , Y10S438/978
摘要： A device-isolating trench having a taper at its upper portion is formed in a silicon semiconductor substrate. Then, a silicon oxide film is formed on the inner wall of the trench and the surface of the semiconductor substrate near the trench by an oxidizing method, and polycrystalline silicon is buried in the trench.
摘要翻译：在硅半导体衬底中形成在其上部具有锥形的器件隔离沟槽。然后，通过氧化法在沟槽的内壁和沟槽附近的半导体衬底的表面上形成氧化硅膜，并且将多晶硅埋入沟槽中。

6. 发明授权

US5380399A Method of treating semiconductor substrates 失效
标题翻译：处理半导体衬底的方法
公开(公告)号：US5380399A
公开(公告)日：1995-01-10
申请号：US120436
申请日：1993-09-14
申请人： Naoto Miyashita , Koichi Takahashi , Mitsutoshi Koyama
发明人： Naoto Miyashita , Koichi Takahashi , Mitsutoshi Koyama
IPC分类号： H01L21/302 , H01L21/304 , H01L21/306 , H01L21/31 , B44C1/22 , C03C15/00
CPC分类号： H01L21/02046
摘要： To heat treat a semiconductor substrate without forming an oxide film on the surface thereof, the method of heat treating a semiconductor substrate, comprises: a step 1 of carrying a semiconductor substrate into a heat treating chamber heated at a temperature 150.degree. C. or lower; a step 2 of heating the heat treating chamber up to about 200.degree. C. to emit moisture adhering to the semiconductor substrate; a step 3 of introducing an etching gas into the heat treating chamber to etch an oxide film formed on the surface of the semiconductor substrate; and a step 4 of raising the temperature within the heat treating chamber up to a heat treating temperature to heat treat the semiconductor substrate.
摘要翻译：为了在其表面上不形成氧化膜来热处理半导体衬底，对半导体衬底进行热处理的方法包括：将半导体衬底承载在加热到150℃或更低温度的热处理室中的步骤1 ; 将热处理室加热至约200℃的步骤2，以发出附着在半导体基板上的水分; 将蚀刻气体引入到所述热处理室中以蚀刻形成在所述半导体衬底的表面上的氧化膜的步骤3; 以及将热处理室内的温度升高至热处理温度以热处理半导体衬底的步骤4。

7. 发明授权

US5029554A Semiconductor manufacturing apparatus including a temperature control mechanism 失效
标题翻译：包括温度控制机构的半导体制造装置
公开(公告)号：US5029554A
公开(公告)日：1991-07-09
申请号：US330044
申请日：1989-03-29
申请人： Naoto Miyashita , Koichi Takahashi , Hiroshi Kinoshita
发明人： Naoto Miyashita , Koichi Takahashi , Hiroshi Kinoshita
IPC分类号： H01L21/31 , H01L21/00 , H01L21/318
CPC分类号： H01L21/67115
摘要： A semiconductor manufacturing apparatus includes a furnace having a tubular body with inner and outer tubular members. A boat having wafers mounted thereon is positioned inside the inner tubular member. Temperature control inside the tubular body is provided by a thermocouple device located between the inner and outer tubular members. A mixture of dichlorosilane gas and ammonium gas formed by a mixing nozzle at a temperature which is lower than the temperature in the tubular body is supplied to the wafers from positions juxtaposed with the wafers mounted on the boat.

8. 再颁专利

USRE36328E Semiconductor manufacturing apparatus including temperature control mechanism 失效
标题翻译：半导体制造装置包括温度控制机构
公开(公告)号：USRE36328E
公开(公告)日：1999-10-05
申请号：US915608
申请日：1997-08-21
申请人： Naoto Miyashita , Koichi Takahashi , Hiroshi Kinoshita
发明人： Naoto Miyashita , Koichi Takahashi , Hiroshi Kinoshita
IPC分类号： H01L21/00 , C23C16/00
CPC分类号： H01L21/67115
摘要： A semiconductor manufacturing apparatus includes a furnace having a tubular body with inner and outer tubular members. A boat having wafers mounted thereon is positioned inside the inner tubular member. Temperature control inside the tubular body is provided by a thermocouple device located between the inner and outer tubular members. A mixture of dichlorosilane gas and ammonium gas formed by a mixing nozzle at a temperature which is lower than the temperature in the tubular body is supplied to the wafers from positions juxtaposed with the wafers mounted on the boat.
摘要翻译：半导体制造装置包括具有带有内管状构件和外管状构件的管状体的炉。具有安装在其上的晶片的船定位在内管状构件的内部。管状体内的温度控制由位于内管状构件和外管状构件之间的热电偶装置提供。在低于管状体温度的混合喷嘴形成的二氯硅烷气体和铵气体的混合物从与安装在船上的晶片并置的位置供应到晶片。

9. 发明授权

US5589421A Method of manufacturing annealed films 失效
标题翻译：制造退火膜的方法
公开(公告)号：US5589421A
公开(公告)日：1996-12-31
申请号：US300067
申请日：1994-09-01
申请人： Naoto Miyashita , Koichi Takahashi , Mitsutoshi Koyama , Shinji Nunotani , Satoshi Yanagiya , Yoshiro Baba
发明人： Naoto Miyashita , Koichi Takahashi , Mitsutoshi Koyama , Shinji Nunotani , Satoshi Yanagiya , Yoshiro Baba
IPC分类号： H01L21/205 , C23C16/44 , C23C16/46 , C23C16/54 , C30B25/10 , H01L21/00 , H01L21/22 , H01L21/31 , H01L21/331 , H01L29/73 , H01L21/302 , H01L21/463
CPC分类号： H01L21/67115 , C23C16/44 , C23C16/54 , C30B25/10 , Y10S438/906
摘要： A chemical vapor deposition apparatus comprises a reaction chamber for annealing a silicon wafer, a transportation mechanism for transporting the silicon wafer to the reaction chamber, a detecting device for detecting temperature of the reaction chamber, and an operation control device for receiving signals corresponding to the temperature of the reaction chamber, and supplying to the transportation mechanism, other signals for preventing the silicon wafer from being transported when the temperature is 100.degree. C. or more.
摘要翻译：化学气相沉积装置包括用于退火硅晶片的反应室，用于将硅晶片输送到反应室的输送机构，用于检测反应室温度的检测装置，以及用于接收对应于该反应室的信号的操作控制装置反应室的温度，并向输送机构供给在温度为100℃以上时防止硅晶片输送的其他信号。

10. 发明授权

US5858859A Semiconductor device having a trench for device isolation fabrication method 失效
标题翻译：具有用于器件隔离制造方法的沟槽的半导体器件
公开(公告)号：US5858859A
公开(公告)日：1999-01-12
申请号：US874317
申请日：1997-06-13
申请人： Naoto Miyashita , Koichi Takahashi
发明人： Naoto Miyashita , Koichi Takahashi
IPC分类号： H01L21/306 , H01L21/308 , H01L21/762 , H01L21/76
CPC分类号： H01L21/3085 , H01L21/30604 , H01L21/30608 , H01L21/3083 , H01L21/76235 , Y10S438/978
摘要： A device-isolating trench having a taper at its upper portion is formed in a silicon semiconductor substrate. Then, a silicon oxide film is formed on the inner wall of the trench and the surface of the semiconductor substrate near the trench by an oxidizing method, and polycrystalline silicon is buried in the trench.
摘要翻译：在硅半导体衬底中形成在其上部具有锥形的器件隔离沟槽。然后，通过氧化法在沟槽的内壁和沟槽附近的半导体衬底的表面上形成氧化硅膜，并且将多晶硅埋入沟槽中。

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