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1. 发明专利

JP2004071701A Semiconductor element and manufacturing method therefor 审中-公开
公开(公告)号：JP2004071701A
公开(公告)日：2004-03-04
申请号：JP2002226174
申请日：2002-08-02
申请人： Nec Corp , 日本電気株式会社
发明人： FUJIWARA AKIRA , KURODA NAOTAKA , IKENAGA YOSHIFUMI , TANAKA SHINICHI
IPC分类号： H01L21/331 , H01L29/737
摘要： PROBLEM TO BE SOLVED: To provide an element structure where an emitter area can selectively be etched with superior controllability in a hetero-junction bipolar transistor, a hetero-junction bipolar transistor having an InP emitter layer, for example, and to provide a manufacturing process of it. SOLUTION: An etching mask material 14 protecting a corner is formed in a [010] direction, a [100] direction or a rectangular corner in a direction equal to the direction whose etching rates against an InP layer are large, when the InP emitter layer formed on a substrate where a (001) face is made to be a main surface is etched in a rectangle having sides in the objective [110] direction and the [110] direction. Then, it is selectively etched. Thus, a rectangular InP emitter layer 5 without an unnecessarily large undercut is formed. COPYRIGHT: (C)2004,JPO

2. 发明专利

JP2000299386A SEMICONDUCTOR CIRCUIT DEVICE AND MANUFACTURING METHOD THEREFOR 失效
公开(公告)号：JP2000299386A
公开(公告)日：2000-10-24
申请号：JP10699499
申请日：1999-04-14
申请人： NEC CORP
发明人： TANAKA SHINICHI
IPC分类号： H01L29/73 , H01L21/331 , H01L21/822 , H01L21/8222 , H01L27/04 , H01L27/06 , H01L29/205 , H01L29/737 , H01L29/93
摘要： PROBLEM TO BE SOLVED: To realize a varactor with good satisfactory modulation characteristics that does not cause deterioration at high frequency waves of a transistor. SOLUTION: An emitter layer 51, an emitter intermediate layer 52, an emitter intermediate layer 53, and an emitter/contact layer 54 each has an n-type impurity density that increases sequentially in this order. In a transistor part 10a, a junction capacity of a p-n junction between a p-type base layer 4 and the emitter layer 51 is limited to a low level, to prevent a decrease in high-frequency characteristics. In a varactor part 11a, an anode electrode 104a is formed in the emitter intermediate layer 53 with high impurity density, and a cathode electrode 105a is formed on the emitter layer 51 with low impurity density to constitute a diode with hyperabrupt junction structure. An alloyed region 6a as an ohmic electrode is formed immediately under the cathode electrode 105a.

3. 发明专利

JPH08181152A HETEROJUNCTION BIPOLAR TRANSISTOR 失效
公开(公告)号：JPH08181152A
公开(公告)日：1996-07-12
申请号：JP32265094
申请日：1994-12-26
申请人： NEC CORP
发明人： TANAKA SHINICHI
IPC分类号： H01L29/73 , H01L21/331 , H01L29/737
摘要： PURPOSE: To prevent deterioration of current gain characteristics by forming a trench penetrating an emitter layer, in the boundary of an intrinsic emitter region formed in an emitter layer and a semi-insulating emitter leading-out region, and filling the trench with high insulating film. CONSTITUTION: A collector contact layer 2c, a collector layer 2, a base layer 3 and an emitter layer 4 are formed on the surface of a GaAs substrate. A collector electrode 5c is connected with the collector contact layer 2c, and a base electrode 5b is connected with the base layer 3. The emitter layer 4 consists of an intrinsic emitter region 6 and an emitter leading-out region 7, between which a trench 9 is formed. The trench 9 penetrates the emitter layer 4 and the base layer 3, and is filled with a silicon oxide film 10 as an insulating film. Thereby carriers flowing in the intrinsic emitter region in the emitter layer are not directly brought into contact with the emitter leading-out region, so that deterioration of current gain characteristics can be easily prevented.

4. 发明专利

JPH04252034A MANUFACTURE OF HETEROJUNCTION BIPOLAR TRANSISTOR 失效
公开(公告)号：JPH04252034A
公开(公告)日：1992-09-08
申请号：JP819391
申请日：1991-01-28
申请人： NEC CORP
发明人： TANAKA SHINICHI
IPC分类号： H01L21/302 , H01L21/3065 , H01L21/331 , H01L29/73 , H01L29/737
摘要： PURPOSE:To make the interval between a base electrode and an emitter small and to prevent that a base resistance and a collector capacity are increased by a method wherein a dummy emitter is reduced in advance, eaves are compensated and the overhang of the emitter electrode form an emitter mesa is reduced. CONSTITUTION:Insulating films 7, 7a are dry-etched by making use of a photoresist 8 as a mask; dummy emitters are formed. Then, the dummy emitters are etched by using buffered hydrofluoric acid; then, only the side face of the substrate 7a composed of SiO2 is etched. When the etching time is controlled, the desired side-etching width of the insulating film 7a composed of SiO2 can be obtained. Then, an emitter cap layer 6 is etched by making use of the dummy emitters 7, 7a as a mask; after that, an emitter layer 5 composed of InP is etched selectively with reference to InGaAs; a base layer 4 is revealed; after that, only the side face of the emitter layer 5 is etched.

5. 发明专利

JPH03272246A DEMODULATION CIRCUIT 失效
公开(公告)号：JPH03272246A
公开(公告)日：1991-12-03
申请号：JP7246690
申请日：1990-03-20
申请人： NEC CORP , NIPPON ELECTRIC ENG
发明人： ICHIYOSHI OSAMU , TANAKA SHINICHI
IPC分类号： H04L27/227 , H04L27/22
摘要： PURPOSE:To improve the bit error rate characteristic by providing a 2nd complex number multiplier receiving an output signal from a delay device and a 1st complex number multiplier and applying complex number multiplication, a carrier frequency error discriminator and an AFC circuit and detecting an output of a 1st complex number multiplier. CONSTITUTION:An AFC circuit consists of a numeral control oscillator NCO 7, a 1st complex number multiplier 1, a delay device 4, a 2nd complex number multiplier 2, a carrier frequency error discriminator 5 and an LPF 6 so as to make a carrier frequency error of a signal SH zero. A carrier recovery circuit 10 receives the signal SH without a carrier frequency error to generate a recovered carrier and outputs it to a 3rd complex number multiplier 3. The complex number multiplier 3 uses the recovery carrier to apply synchronization detection to the signal SH without a carrier frequency error and outputs a demodulation data signal So.

6. 发明专利

JPH02212929A VOLTAGE CONTROLLED OSCILLATOR 失效
公开(公告)号：JPH02212929A
公开(公告)日：1990-08-24
申请号：JP3262089
申请日：1989-02-14
申请人： NEC CORP , NIPPON ELECTRIC ENG
发明人： ICHIYOSHI OSAMU , TANAKA SHINICHI
IPC分类号： G06F1/02 , G06F7/544 , G06F17/10
摘要： PURPOSE:To realize a function of a digital voltage controlled oscillator (VCO) by fetching an input control signal by time-sharing with the use of a DSP, respectively executing arithmetic processings, and outputting processing results through a serial output port and a parallel output port. CONSTITUTION:A VCO consists of a digital signal processor (DSP) 10 operated at high speed clocks. The DSP 10 reads a binary control signal 100 supplied from the outside by an interrupting signal 120 applied from the outside, executes the arithmetic processings according to a built-in processing procedure, and the processing result is outputted from parallel output ports 11 to 18 as a parallel binary format output signal 110. Further a second control signal 100a which is different from the control signal is read, the other processing is executed according to the other built-in processing procedure, and the processing result is outputted from a serial output port 19 as a serial binary signal 200. Thus the voltage controlled oscillator which can be obtained low frequency modulating sensitivity can be obtained.

7. 发明专利

JPH01251659A MANUFACTURE OF HETERO JUNCTION BIPOLAR TRANSISTOR 失效
公开(公告)号：JPH01251659A
公开(公告)日：1989-10-06
申请号：JP7945588
申请日：1988-03-30
申请人： NEC CORP
发明人： TANAKA SHINICHI
IPC分类号： H01L29/73 , H01L21/331 , H01L29/205 , H01L29/72 , H01L29/737
摘要： PURPOSE:To form a collector mesa on an intrinsic emitter region of minimum size without using lithography mask, and manufacture a hetero junction bipolar transistor whose parasitic base resistance can be reduced, by selectively re- growing crystal by using a mask composed of an insulating film. CONSTITUTION:By using photo resist 9 as a mask, a first and a second insulating masks 10a, 10b are subjected to anisotropic etching and eliminated. Thus an aperture part 20 is formed, and an emitter layer 3 and a part of a re-growth base contact layer 5c are exposed. After the photo resist 9 is eliminated, an intrinsic base layer 5i composed of P GaAs, a collector layer 6 composed of N GaAs and a high concentration collector layer 7 are re-grown in the aperture part 20, by using the left second insulating film 10b as a mask for selective re-growth. By growing these layers, a collector.mesa is formed. Since the area of the collector.mesa can be controlled by the thickness of the second insulating film 10b, it can be formed so as to have a necessary and minimum dimension and a uniform size in the peripheral part of an intrinsic transistor region 11.

8. 发明专利

JPH01149465A HETEROJUNCTION BIPOLAR TRANSISTOR 失效
公开(公告)号：JPH01149465A
公开(公告)日：1989-06-12
申请号：JP30814787
申请日：1987-12-04
申请人： NEC CORP
发明人： TANAKA SHINICHI
IPC分类号： H01L29/205 , H01L21/331 , H01L29/72 , H01L29/73 , H01L29/737
摘要： PURPOSE:To enable electrons to travel rapidly in a collector layer and to improve on the collector in its breakdown strength against a backward bias by a method wherein the collector layer is a semiconductor layer so doped as to satisfy some specified conditions and is in Schottky-type contact with a collector electrode. CONSTITUTION:A Wc-thick collector layer is a single-layer structure built of a semiconductor material 'a' which is not doped with any impurity or a semiconductor material 'b' which is doped with an impurity and satisfies a formula where impurity concentration is NA, collector impurity concentration is ND, semiconductor dielectric factor is epsilons, charge elementary quantity is 'q', and base.collector junction internal potential is Vbi. The collector layer forms a Schottky-type contact with a collector electrode. With the bend of the energy band in the collector being quite small and negligible, no intensive electric field will locally concentrate in the collector layer. Such a collector section is a simple structure built only of a thin semiconductor layer and a metal electrode, which eliminates the need for a high concentration semiconductor layer for an ohmic contact between the semiconductor and the electrode.

9. 发明专利

JP2002124522A BIPOLAR TRANSISTOR AND ITS MANUFACTURING METHOD 审中-公开
公开(公告)号：JP2002124522A
公开(公告)日：2002-04-26
申请号：JP2001269861
申请日：2001-09-06
申请人： NEC CORP
发明人： TANAKA SHINICHI
IPC分类号： H01L21/331 , H01L29/737
摘要： PROBLEM TO BE SOLVED: To provide a bipolar transistor which has a reverse structure by which minority carrier injection into a component extrinsic region is suppressed. SOLUTION: In the component intrinsic region 12, the potential barrier of the minority carrier is reduced by composing an emitter of an emitter layer 31 and an emitter layer 32 and the flow 25b of the injected minority carrier from the emitter to a base layer 41 is made smooth. On the other hand, in the component extrinsic region 13, the minority carrier injection 25a from the emitter layer 31 to an external base layer 42 can be suppressed by removing the emitter layer 32 which has the effect of reducing the potential barrier of the injected minority carrier.

10. 发明专利

JPH10125796A HETERO-JUNCTION BIPOLAR TRANSISTOR 失效
公开(公告)号：JPH10125796A
公开(公告)日：1998-05-15
申请号：JP27455896
申请日：1996-10-17
申请人： NEC CORP
发明人： TANAKA SHINICHI
IPC分类号： H01L29/73 , H01L21/331 , H01L21/8222 , H01L27/06 , H01L29/737
摘要： PROBLEM TO BE SOLVED: To reduce the matching loss of an HBT(hetero-junction bipolar transistor) which is composed of a plurality of cell transistors. SOLUTION: An inductance is composed of a collector lead wiring 3b. A collector wiring 3 is provided above a base wiring 4 with a dielectric insulating film 9 therebetween to form a capacitance. An impedance matching circuit is composed of the inductance and capacitance. As the lengths of respective cell transistors 1 and the lengths of the collector lead wirings 3b are approximately uniform, the matching conditions of the respective cell transistors are uniform, so that the matching loss can be minimized.

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