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    • 2. 发明申请
    • LIQUID CRYSTAL DISPLAY AND METHOD THEREOF
    • 液晶显示及其方法
    • US20110205462A1
    • 2011-08-25
    • US13097579
    • 2011-04-29
    • Min-Cheol LEE
    • Min-Cheol LEE
    • G02F1/1343
    • G09G3/3659G02F1/136213G09G3/3648G09G3/3655G09G2300/0443G09G2320/028
    • A liquid crystal display includes a first gate electrode, a storage electrode having a body and an extension, a first semiconductor formed on a gate insulating layer, a first drain electrode formed on the first semiconductor, separated from a first source electrode, and having an end portion overlapping the first gate electrode, and an expansion overlapping the body of the storage electrode and distanced from the end portion with a connection connecting the end portion and the expansion and overlapping the extension of the storage electrode, a passivation layer having a contact hole exposing the expansion of the first drain electrode, and a first field-generating electrode connected to the first drain electrode through the contact hole.
    • 液晶显示器包括第一栅电极,具有本体和延伸部的存储电极,形成在栅极绝缘层上的第一半导体,形成在第一半导体上的第一漏电极,与第一源电极分离,并且具有 端部与第一栅电极重叠,并且膨胀与存储电极的主体重叠并且与端部间隔开,连接端部和扩展部并且与存储电极的延伸部重叠;钝化层,具有接触孔 暴露第一漏电极的膨胀,以及通过接触孔连接到第一漏电极的第一场产生电极。
    • 3. 发明申请
    • GATE DRIVING DEVICE AND LIQUID CRYSTAL DISPLAY HAVING THE SAME
    • 闸门驱动装置和液晶显示器
    • US20100156869A1
    • 2010-06-24
    • US12645902
    • 2009-12-23
    • Min-Cheol LEESeung-Hwan MOON
    • Min-Cheol LEESeung-Hwan MOON
    • G09G3/36H03B1/00G09G5/00
    • G09G3/3677G09G2300/0426G09G2310/0286G11C19/184G11C19/28
    • A gate driving device includes a plurality of stages, a first dummy stage connected to the plurality of stages and a second dummy stage connected to the first dummy stage. Stages of the plurality of stages are cascaded. The first dummy stage includes a first charge unit which receives a first input signal from a previous stage of the plurality of stages and is thereby charged, and a first pull-up transistor which outputs a clock signal when the first charge unit reaches a first charge level. The second dummy stage includes a second charge unit which receives a second input signal from the first dummy stage and is thereby charged, and a second pull-up transistor which outputs the clock signal when the second charge unit reaches a second charge level higher than the first charge level.
    • 栅极驱动装置包括多个级,连接到多个级的第一虚拟级和连接到第一虚拟级的第二虚拟级。 多级的阶段是级联的。 第一虚拟级包括第一充电单元,其接收来自多级的前一级的第一输入信号并由此充电;以及第一上拉晶体管,其在第一充电单元达到第一充电时输出时钟信号 水平。 第二虚拟级包括第二充电单元,其从第一虚拟级接收第二输入信号并由此被充电;以及第二上拉晶体管,当第二充电单元达到比第二充电电平高的第二充电电平时,输出时钟信号 第一充电水平。
    • 5. 发明申请
    • GATE DRIVING CIRCUIT, DISPLAY APPARATUS HAVING THE SAME, AND METHOD THEREOF
    • 门控驱动电路,具有该门电路的显示装置及其方法
    • US20080100560A1
    • 2008-05-01
    • US11928466
    • 2007-10-30
    • Byoung-Sun NADong-Hyeon KIMin-Cheol LEESoon-Il AHN
    • Byoung-Sun NADong-Hyeon KIMin-Cheol LEESoon-Il AHN
    • G09G3/36
    • G11C19/28G09G3/3677G09G2320/0219G09G2320/041
    • In a gate driving circuit and a display apparatus having the gate driving circuit, a pull-up transistor of a present stage among plural stages, which are connected one after another to each other and sequentially output a gate signal, pulls up a present gate signal output through an output terminal to a gate-on voltage. A buffer transistor is connected to a control terminal of the pull-up transistor to receive a previous output signal from a previous stage and to turn on the pull-up transistor. The buffer transistor has a chargeability that is about two times or greater than the chargeability of the pull-up transistor. Thus, the size of the pull-up transistor may be reduced, thereby preventing a malfunction of the gate driving circuit when the gate driving circuit is operated under conditions of high temperature or low temperature.
    • 在具有栅极驱动电路的栅极驱动电路和显示装置中,将多个相互依次连接并依次输出栅极信号的多级中的当前级的上拉晶体管拉起当前的栅极信号 通过输出端子输出到栅极导通电压。 缓冲晶体管连接到上拉晶体管的控制端,以接收来自前一级的先前输出信号并接通上拉晶体管。 缓冲晶体管具有的电荷率约为上拉晶体管的充电能力的两倍或更大。 因此,可以减小上拉晶体管的尺寸,从而当栅极驱动电路在高温或低温条件下工作时,防止栅极驱动电路的故障。
    • 6. 发明申请
    • GATE DRIVING CIRCUIT AND DISPLAY DEVICE HAVING THE SAME
    • 门驱动电路和具有该门的显示装置
    • US20100039363A1
    • 2010-02-18
    • US12507316
    • 2009-07-22
    • Min-Cheol LEEYong-Soon LEE
    • Min-Cheol LEEYong-Soon LEE
    • G09G3/36
    • G09G3/3674G02F1/13454G09G3/3266G09G2300/0408G09G2310/0267G09G2310/0286G09G2360/16G11C19/28
    • A gate driving circuit that may be capable of improving driving margin and maintaining reliability even after long use, and a display device having the gate driving circuit. The gate driving circuit includes a shift register having a plurality of stages dependently connected to one another, wherein each stage includes a pull-up unit outputting a first clock signal as a gate signal in response to a signal of a first node, to which a first input signal is applied, a pull-down unit discharging the gate signal to a gate-off voltage in response to a second input signal, a discharging unit discharging the signal of the first node to the gate-off voltage in response to the second input signal, and a holding unit maintaining the signal of the first node at the gate-off voltage in response to a delay signal of the first clock signal.
    • 一种能够在长时间使用后能够提高驱动余量并保持可靠性的栅极驱动电路,以及具有栅极驱动电路的显示装置。 栅极驱动电路包括具有相互依次连接的多个级的移位寄存器,其中每一级包括上拉单元,其响应于第一节点的信号而将第一时钟信号作为门信号输出, 施加第一输入信号,下拉单元响应于第二输入信号将门信号放电到栅极截止电压,放电单元响应于第二输入信号将第一节点的信号放电到栅极截止电压 输入信号和保持单元,其响应于第一时钟信号的延迟信号而将第一节点的信号保持在栅极截止电压。