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1. 发明授权

US09311142B2 Controlling memory access conflict of threads on multi-core processor with set of highest priority processor cores based on a threshold value of issued-instruction efficiency 有权
标题翻译：基于发出指令效率的阈值，控制多核处理器上的线程的内存访问冲突与一组最高优先级的处理器内核
公开(公告)号：US09311142B2
公开(公告)日：2016-04-12
申请号：US13569725
申请日：2012-08-08
申请人： Koichiro Yamashita , Hiromasa Yamauchi , Kiyoshi Miyazaki
发明人： Koichiro Yamashita , Hiromasa Yamauchi , Kiyoshi Miyazaki
IPC分类号： G06F9/50 , G06F9/48 , G06F13/18 , G06F13/26 , G06F13/16 , G06F9/52 , G06F9/445
CPC分类号： G06F3/0629 , G06F3/0604 , G06F3/0673 , G06F9/44552 , G06F9/4881 , G06F9/52 , G06F13/1652 , G06F13/18 , G06F13/26
摘要： A multi-core processor system includes multiple cores and memory accessible from the cores, where a given core is configured to detect among the cores, first cores having a highest execution priority level; identify among the detected first cores, a second core that caused access conflict of the memory; and control a third core that is among the cores, excluding the first cores and the identified second core, the third core being controlled to execute for a given interval during an interval when the access conflict occurs, a thread that does not access the memory.
摘要翻译：多核处理器系统包括多个核心和可从核心访问的存储器，其中给定核心被配置为在核心之间检测具有最高执行优先级的第一核心; 在检测到的第一核心之间识别引起存储器的访问冲突的第二核心; 并且控制在核心之内的第三核心，不包括第一核心和所识别的第二核心，第三核心被控制以在发生访问冲突的间隔期间执行给定的间隔时，不访问存储器的线程。

2. 发明授权

US08548451B2 Information processing system, apparatus, and method 有权
标题翻译：信息处理系统，装置和方法
公开(公告)号：US08548451B2
公开(公告)日：2013-10-01
申请号：US13251388
申请日：2011-10-03
申请人： Koichiro Yamashita , Hiromasa Yamauchi , Takahisa Suzuki , Koji Kurihara , Kiyoshi Miyazaki
发明人： Koichiro Yamashita , Hiromasa Yamauchi , Takahisa Suzuki , Koji Kurihara , Kiyoshi Miyazaki
IPC分类号： H04W4/02
CPC分类号： H04W4/023 , H04W64/00
摘要： An information processing system includes a first apparatus including a position information transmission unit to transmit information on the position of the first apparatus; and a second apparatus including, a position information acquisition unit to acquire a position of the second apparatus; a position information receiving unit to receive the information on the position of the first apparatus; a relative-position information acquisition unit to acquire relative-position information of the second and the first apparatus on the basis of the information on the position of the second and the first apparatus; and a control unit to control a coupling mode of the second and the first apparatus on the basis of the relative-position information.
摘要翻译：信息处理系统包括：第一装置，包括位置信息发送单元，用于发送关于第一装置的位置的信息; 以及第二装置，包括：位置信息获取单元，用于获取所述第二装置的位置; 位置信息接收单元，用于接收关于所述第一装置的位置的信息; 相对位置信息获取单元，基于关于第二和第一装置的位置的信息来获取第二和第一装置的相对位置信息; 以及控制单元，其基于相对位置信息来控制第二和第一装置的耦合模式。

3. 发明申请

US20130007758A1 MULTI-CORE PROCESSOR SYSTEM, THREAD SWITCHING CONTROL METHOD, AND COMPUTER PRODUCT 审中-公开
标题翻译：多核处理器系统，线程切换控制方法和计算机产品
公开(公告)号：US20130007758A1
公开(公告)日：2013-01-03
申请号：US13614071
申请日：2012-09-13
申请人： Koichiro Yamashita , Hiromasa Yamauchi , Kiyoshi Miyazaki
发明人： Koichiro Yamashita , Hiromasa Yamauchi , Kiyoshi Miyazaki
IPC分类号： G06F9/46
CPC分类号： G06F9/4881 , G06F9/4825 , G06F2209/486
摘要： A multi-core processor system includes a given core configured to switch at a prescribed switching period, threads assigned to the given core; identify whether the given core has switched threads at a period exceeding the prescribed switching period; correct the prescribed switching period into a shorter switching period, based on a difference of an actual switching period at which the threads have been switched by the given core and the prescribed switching period; and set the corrected switching period as the prescribed switching period.
摘要翻译：多核处理器系统包括被配置为在规定的切换周期切换的给定核心，分配给给定核心的线程; 确定给定的核心是否在超过规定的切换周期的时间段内切换了线程; 基于由给定核心切换线程的实际切换周期与规定切换周期之间的差异，将规定的切换周期更正为更短的切换周期; 并将修正的开关周期设定为规定的切换期间。

4. 发明申请

US20130007490A1 MULTICORE PROCESSOR SYSTEM, POWER CONTROL METHOD, AND COMPUTER PRODUCT 审中-公开
标题翻译：多重处理器系统，功率控制方法和计算机产品
公开(公告)号：US20130007490A1
公开(公告)日：2013-01-03
申请号：US13608001
申请日：2012-09-10
申请人： Koichiro Yamashita , Hiromasa Yamauchi , Kiyoshi Miyazaki , Takahisa Suzuki , Koji Kurihara
发明人： Koichiro Yamashita , Hiromasa Yamauchi , Kiyoshi Miyazaki , Takahisa Suzuki , Koji Kurihara
IPC分类号： G06F1/32 , G06F15/76
CPC分类号： G06F9/4893 , G06F1/3203 , G06F1/3243 , G06F9/5094 , Y02D10/152 , Y02D10/22 , Y02D10/24
摘要： A multicore processor system having multiple cores, includes processors configured to measure bandwidth of a network; compare the measured bandwidth and a given threshold; determine among the cores and based on an obtained comparison result, a core adjustment number by which the number of cores executing a given process related to data communicated through the network is adjusted; calculate the number of executing cores after adjustment by the core adjustment number and based on the number of cores executing the given process before the adjustment and the determined core adjustment number; specify a core executing the given process among the cores and based on the calculated number of executing cores after the adjustment; and distribute the communicated data to the specified core executing the given process.
摘要翻译：具有多个核心的多核处理器系统包括被配置为测量网络带宽的处理器; 比较测量带宽和给定阈值; 在核心之间确定并且基于获得的比较结果，调整与执行通过网络传送的数据相关的给定处理的核的数量的核心调整数; 通过核心调整号码计算调整后的执行核心数量，并根据在调整前执行给定进程的核心数量和确定的核心调整号码; 在核心之间指定执行给定进程的核心，并且基于在调整之后计算的执行核心数量; 并将传送的数据分发到执行给定进程的指定核心。

5. 发明申请

US20130007439A1 MULTICORE PROCESSOR SYSTEM, COMPUTER PRODUCT, AND NOTIFICATION METHOD 有权
标题翻译：多重处理器系统，计算机产品和通知方法
公开(公告)号：US20130007439A1
公开(公告)日：2013-01-03
申请号：US13613605
申请日：2012-09-13
申请人： Koichiro Yamashita , Hiromasa Yamauchi , Kiyoshi Miyazaki
发明人： Koichiro Yamashita , Hiromasa Yamauchi , Kiyoshi Miyazaki
IPC分类号： G06F9/06
CPC分类号： G06F9/4405 , G06F9/441
摘要： A multicore processor system includes a processor configured to detect, among cores that have booted with an old boot program in the multicore processor, a core to which no process is assigned; change upon detecting a core to which no process is assigned, a reference area from a storage area for the old boot program to a storage area for a new boot program; and notify the core to which no process is assigned of a reboot instruction specifying the reference area after the change.
摘要翻译：多核处理器系统包括处理器，其配置成在多核处理器中用旧引导程序引导的核心之间检测不分配进程的核心; 在检测到没有分配处理的核心的情况下，从旧的引导程序的存储区域到用于新的引导程序的存储区域的参考区域; 并且在更改之后通知指定了指定参考区域的重新引导指令没有进程的核心。

6. 发明授权

US09235426B2 Multicore processor system, computer product, and notification method for updating operating system 有权
标题翻译：多核处理器系统，计算机产品和更新操作系统的通知方法
公开(公告)号：US09235426B2
公开(公告)日：2016-01-12
申请号：US13613605
申请日：2012-09-13
申请人： Koichiro Yamashita , Hiromasa Yamauchi , Kiyoshi Miyazaki
发明人： Koichiro Yamashita , Hiromasa Yamauchi , Kiyoshi Miyazaki
IPC分类号： G06F9/00 , G06F9/44
CPC分类号： G06F9/4405 , G06F9/441
摘要： A multicore processor system includes a processor configured to detect, among cores that have booted with an old boot program in the multicore processor, a core to which no process is assigned; change upon detecting a core to which no process is assigned, a reference area from a storage area for the old boot program to a storage area for a new boot program; and notify the core to which no process is assigned of a reboot instruction specifying the reference area after the change.
摘要翻译：多核处理器系统包括处理器，其配置成在多核处理器中用旧引导程序引导的核心之间检测不分配进程的核心; 在检测到没有分配处理的核心的情况下，从旧的引导程序的存储区域到用于新的引导程序的存储区域的参考区域; 并且在更改之后通知指定了指定参考区域的重新引导指令没有进程的核心。

7. 发明申请

US20130013892A1 HIERARCHICAL MULTI-CORE PROCESSOR, MULTI-CORE PROCESSOR SYSTEM, AND COMPUTER PRODUCT 审中-公开
标题翻译：分层多核处理器，多核处理器系统和计算机产品
公开(公告)号：US20130013892A1
公开(公告)日：2013-01-10
申请号：US13614330
申请日：2012-09-13
申请人： Koichiro Yamashita , Hiromasa Yamauchi , Kiyoshi Miyazaki , Takahisa Suzuki , Koji Kurihara
发明人： Koichiro Yamashita , Hiromasa Yamauchi , Kiyoshi Miyazaki , Takahisa Suzuki , Koji Kurihara
IPC分类号： G06F9/30
CPC分类号： G06F15/17393
摘要： A hierarchical multi-core processor includes a core group for each hierarchy of a hierarchy group constituting a series of communication functions divided according to communication protocol, where a first core group of a given hierarchy among the hierarchy group is connected to a second core group of another hierarchy constituting a first communication function to be executed following a second communication function of the given hierarchy.
摘要翻译：分级多核处理器包括构成根据通信协议划分的一系列通信功能的层级组的每个层级的核心组，其中层级组中给定层级的第一核心组连接到第二核心组构成在所述给定层次的第二通信功能之后执行的第一通信功能的另一层次。

8. 发明申请

US20120304184A1 MULTI-CORE PROCESSOR SYSTEM, COMPUTER PRODUCT, AND CONTROL METHOD 审中-公开
标题翻译：多核处理器系统，计算机产品和控制方法
公开(公告)号：US20120304184A1
公开(公告)日：2012-11-29
申请号：US13570799
申请日：2012-08-09
申请人： Koichiro Yamashita , Hiromasa Yamauchi , Kiyoshi Miyazaki
发明人： Koichiro Yamashita , Hiromasa Yamauchi , Kiyoshi Miyazaki
IPC分类号： G06F9/46
CPC分类号： G06F9/505
摘要： A multi-core processor system includes a multi-core processor and a storage apparatus storing for each application, a reliability level related to operation, where a given core accesses the storage apparatus and is configured to extract from the storage apparatus, the reliability level for a given application that invokes a given thread; judge based on the extracted reliability level and a specified threshold, whether the given application is an application of high reliability; identify, in the multi-core processor, a core that has not been allocated a thread of an application of low reliability, when judging that the given application is an application of high reliability, and identify in the multi-core processor, a core that has not been allocated a thread of an application of high reliability, when judging that the given application is an application of low reliability; and give to the identified core, an invocation instruction for the given thread.
摘要翻译：多核处理器系统包括多核处理器和存储装置，用于存储与应用有关的可靠性等级，其中，给定核存取存储装置并配置为从存储装置提取可靠性级别调用给定线程的给定应用程序; 基于提取的可靠性级别和指定的阈值判断给定的应用是否是高可靠性的应用; 在多核处理器中，在判断出给定应用是高可靠性的应用并且在多核处理器中识别核心时，在多核处理器中识别尚未分配低可靠性应用的线程的核心在判断给定应用是低可靠性的应用时，尚未分配高可靠性应用的线程; 并给出确定的核心，给定线程的调用指令。

9. 发明申请

US20130007763A1 GENERATING METHOD, SCHEDULING METHOD, COMPUTER PRODUCT, GENERATING APPARATUS, AND INFORMATION PROCESSING APPARATUS 审中-公开
标题翻译：产生方法，调度方法，计算机产品，生成装置和信息处理装置
公开(公告)号：US20130007763A1
公开(公告)日：2013-01-03
申请号：US13613972
申请日：2012-09-13
申请人： Koichiro Yamashita , Hiromasa Yamauchi , Kiyoshi Miyazaki
发明人： Koichiro Yamashita , Hiromasa Yamauchi , Kiyoshi Miyazaki
IPC分类号： G06F9/46 , G06F9/44
CPC分类号： G06F9/4881 , G06F9/5083
摘要： A generating method is executed by a processor. The method includes executing simulation using a simulation model expressing a processor model, a memory model to which the processor model is accessible, and a load source that accesses the memory model according to an access contention rate, to obtain an index value for performance of the processor model, for each access contention rate; and saving to a memory area and as contention characteristics information, the index value for each access contention rate.
摘要翻译：生成方法由处理器执行。该方法包括使用表示处理器模型的模拟模型，可访问处理器模型的存储器模型以及根据接入争用速率访问存储器模型的负载源来执行仿真，以获得用于执行处理器型号，针对每个访问争用率; 并存储到存储区域和作为争用特征信息，每个访问争用率的索引值。

10. 发明申请

US20120304162A1 UPDATE METHOD, UPDATE APPARATUS, AND COMPUTER PRODUCT 审中-公开
标题翻译：更新方法，更新装置和计算机产品
公开(公告)号：US20120304162A1
公开(公告)日：2012-11-29
申请号：US13569659
申请日：2012-08-08
申请人： Hiromasa YAMAUCHI , Koichiro Yamashita
发明人： Hiromasa YAMAUCHI , Koichiro Yamashita
IPC分类号： G06F9/44
CPC分类号： G06F8/65
摘要： An update method is executed by a processor that downloads a new version of a file concerning a library in an operating system and deletes an old version of the file. The update method includes detecting presence of the new version of the file; creating, when the new version of the file is detected, a second node that specifies a second storage area that is a different area from a first storage area for the old version of the file that is specified by a first node; checking, when the new version of the file is downloaded to the second storage area, whether the old version of the file is in use; and giving notification of an instruction to delete the first node and the old version of the file, when the old version of the file is confirmed at the checking to not be in use.
摘要翻译：更新方法由处理器执行，该处理器下载关于操作系统中的库的新版本的文件，并删除该文件的旧版本。更新方法包括检测文件的新版本的存在; 当检测到所述文件的新版本时，创建指定与由第一节点指定的所述文件的旧版本的第一存储区域不同的区域的第二存储区域的第二节点; 当新版本的文件被下载到第二存储区域时，检查该文件的旧版本是否正在使用; 并且当该检查的旧版本被确认为不被使用时，给出删除第一节点和该文件的旧版本的指令的通知。

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