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    • 9. 发明授权
    • Console box
    • 控制台
    • US08794473B2
    • 2014-08-05
    • US13476537
    • 2012-05-21
    • Yong Gu Kang
    • Yong Gu Kang
    • B65D45/22B65D45/20B65D45/16
    • B65D45/22B60R7/04B65D45/16B65D45/20
    • A console box includes a housing defining an article accommodating space therein and having an opening formed at a front side thereof; a cover coupled to the front side of the housing via hinge couplers disposed at opposite sides of the cover; dampers, each being disposed between each of the hinge couplers of the cover and the housing and controlling an opening speed of the cover; and a torsion spring disposed between each of the hinge couplers of the cover and the housing and elastically supporting the cover. The console box further includes a hinge cover disposed outside each of the hinge couplers of the cover and preventing the cover and the torsion spring from separating from each other.
    • 控制箱包括壳体,其在其中限定物品容纳空间,并且具有形成在其前侧的开口; 通过布置在所述盖的相对侧上的铰链联接器联接到所述壳体的前侧的盖; 阻尼器,每个都布置在盖和壳体的每个铰链联接器之间并且控制盖的打开速度; 以及扭簧,其设置在所述盖和所述壳体的每个铰链联接器之间并且弹性地支撑所述盖。 控制台还包括铰链盖,其设置在盖的每个铰链联接器的外侧,并防止盖和扭簧相互分离。
    • 10. 发明申请
    • SEMICONDUCTOR MEMORY APPARATUS AND TEST METHOD USING THE SAME
    • 半导体存储器和使用它的测试方法
    • US20110075498A1
    • 2011-03-31
    • US12650491
    • 2009-12-30
    • Choung Ki SongYoung Do HurSang Sic YoonYong Gu KangGyung Tae Kim
    • Choung Ki SongYoung Do HurSang Sic YoonYong Gu KangGyung Tae Kim
    • G11C29/00G11C7/00
    • G11C29/12G11C11/401G11C2029/1204
    • A semiconductor memory apparatus includes: a precharge voltage control unit configured to selectively output a bit line precharge voltage or a core voltage as a control voltage in response to a test signal; a bit line equalization unit configured to precharge a bit line to the control voltage; a sense amplifier driving control unit configured to generate a first voltage supply control signal, a second voltage supply control signal and a third voltage supply control signal in response to the test signal, a sense amplifier enable test signal, a first voltage supply signal, a second voltage supply signal and a third voltage supply signal; and a voltage supply unit configured to provide the core voltage, an external voltage and a ground voltage to a sense amplifier with an open bit line structure in response to the first to third voltage supply control signals.
    • 半导体存储装置包括:预充电电压控制单元,被配置为响应于测试信号选择性地输出位线预充电电压或核心电压作为控制电压; 位线均衡单元,被配置为将位线预充电到所述控制电压; 感测放大器驱动控制单元,被配置为响应于测试信号产生第一电压供应控制信号,第二电压供应控制信号和第三电压供应控制信号,感测放大器使能测试信号,第一电压供应信号, 第二电压供给信号和第三电压供给信号; 以及电压供给单元,被配置为响应于所述第一至第三电压供给控制信号,将具有开放位线结构的所述核心电压,外部电压和接地电压提供给具有开放位线结构的读出放大器。