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1. 发明授权

US08634486B2 Signal receiving apparatus, signal receiving method and signal receiving program 有权
标题翻译：信号接收装置，信号接收方法和信号接收程序
公开(公告)号：US08634486B2
公开(公告)日：2014-01-21
申请号：US13235917
申请日：2011-09-19
申请人： Ryoji Ikegaya , Hidetoshi Kawauchi , Suguru Houchi , Naoki Yoshimochi
发明人： Ryoji Ikegaya , Hidetoshi Kawauchi , Suguru Houchi , Naoki Yoshimochi
IPC分类号： H04K1/10 , H04L27/28
CPC分类号： H04L25/03159 , H04L27/265
摘要： A signal receiving apparatus includes: a processing unit configured to carry out Fourier transform on Fourier-transform data serving as a Fourier-transform object and carry out Fourier transform on inverse-Fourier-transform data serving as an inverse-Fourier-transform object; and a control unit configured to output pieces of data obtained as a result of the Fourier transform carried out on the Fourier-transform data in an order, in which the pieces of data have been obtained, in a process of outputting the pieces of data and output other pieces of data obtained as a result of the Fourier transform carried out on the inverse-Fourier transform data by rearranging the other pieces of data in a process of outputting the other pieces of data.
摘要翻译：一种信号接收装置，包括：处理单元，被配置为对作为傅里叶变换对象的傅里叶变换数据进行傅里叶变换，对作为傅里叶逆变换对象的逆傅里叶变换数据进行傅里叶变换; 以及控制单元，被配置为在输出所述数据和/或所述数据的处理中，以获得的所述数据数据的顺序，输出在所述傅立叶变换数据上执行的作为傅立叶变换的结果而获得的数据，以及在输出其他数据的过程中，通过重新排列其他数据，输出通过傅立叶变换的结果而获得的其他数据。

2. 发明授权

US08107519B2 Equalizer, equalization method, program and receiving device 有权
标题翻译：均衡器，均衡方法，程序和接收装置
公开(公告)号：US08107519B2
公开(公告)日：2012-01-31
申请号：US12562384
申请日：2009-09-18
申请人： Hidetoshi Kawauchi , Naoki Yoshimochi , Ryoji Ikegaya
发明人： Hidetoshi Kawauchi , Naoki Yoshimochi , Ryoji Ikegaya
IPC分类号： H03H7/30 , H04B1/10
CPC分类号： H04L25/03057 , H04L2025/03414 , H04L2025/0349 , H04L2025/03547
摘要： An equalizer includes: a replica generation means for generating a replica of a multipath component by applying an adaptive filter to a received signal; a removal means for generating a multipath-component removed signal from which the multipath component has been removed by subtracting the replica from the received signal; a correlation value calculation means for calculating a correlation value between the received signal and the replica; a power value calculation means for calculating a power value of the replica; a determination means for determining whether the replica is the replica of the multipath component based on the correlation value and the power value; and a selection means for outputting the multipath-component removed signal when it is determined that the replica is the replica of the multipath component, and outputting the received signal when it is determined that the replica is not the replica of the multipath component.
摘要翻译：均衡器包括：复制产生装置，用于通过对接收到的信号应用自适应滤波器来产生多径分量的副本; 去除装置，用于生成多径分量去除信号，通过从接收信号中减去复制品，从该多路径分量去除信号已经去除了多路径分量; 相关值计算装置，用于计算接收信号和副本之间的相关值; 用于计算复制品的功率值的功率值计算装置; 确定装置，用于基于所述相关值和所述功率值来确定所述副本是否是所述多路径分量的副本; 以及选择装置，用于当确定副本是多路径分量的副本时输出多路径分量去除信号，并且当确定副本不是多路径分量的副本时，输出接收的信号。

3. 发明授权

US08139664B2 Reception apparatus, reception method and program 有权
标题翻译：接收设备，接收方法和程序
公开(公告)号：US08139664B2
公开(公告)日：2012-03-20
申请号：US12323650
申请日：2008-11-26
申请人： Hidetoshi Kawauchi , Takashi Yokokawa , Takashi Horiguti , Naoki Yoshimochi , Hiroyuki Kamata , Ryoji Ikegaya , Yasuhiro Iida
发明人： Hidetoshi Kawauchi , Takashi Yokokawa , Takashi Horiguti , Naoki Yoshimochi , Hiroyuki Kamata , Ryoji Ikegaya , Yasuhiro Iida
IPC分类号： H04K1/10
CPC分类号： H04L25/0204 , H04L25/022 , H04L25/03019 , H04L27/2607 , H04L2025/03414
摘要： Disclosed herein is a reception apparatus, including, an orthogonal frequency division multiplexing signal reception section, a first filter section, a subtraction section, a second filter section, a coefficient production section, and a Fast Fourier Transformation mathematic operation section.
摘要翻译：这里公开了一种接收装置，包括正交频分复用信号接收部分，第一滤波部分，减法部分，第二滤波部分，系数产生部分和快速傅里叶变换数学运算部分。

4. 发明申请

US20100074318A1 EQUALIZER, EQUALIZATION METHOD, PROGRAM AND RECEIVING DEVICE 有权
标题翻译：均衡器，均衡方法，程序和接收器件
公开(公告)号：US20100074318A1
公开(公告)日：2010-03-25
申请号：US12562384
申请日：2009-09-18
申请人： Hidetoshi KAWAUCHI , Naoki Yoshimochi , Ryoji Ikegaya
发明人： Hidetoshi KAWAUCHI , Naoki Yoshimochi , Ryoji Ikegaya
IPC分类号： H03H7/30 , H03H7/40 , H04B1/10 , H03D1/04 , H04L27/06
CPC分类号： H04L25/03057 , H04L2025/03414 , H04L2025/0349 , H04L2025/03547
摘要： An equalizer includes: a replica generation means for generating a replica of a multipath component by applying an adaptive filter to a received signal; a removal means for generating a multipath-component removed signal from which the multipath component has been removed by subtracting the replica from the received signal; a correlation value calculation means for calculating a correlation value between the received signal and the replica; a power value calculation means for calculating a power value of the replica; a determination means for determining whether the replica is the replica of the multipath component based on the correlation value and the power value; and a selection means for outputting the multipath-component removed signal when it is determined that the replica is the replica of the multipath component, and outputting the received signal when it is determined that the replica is not the replica of the multipath component.
摘要翻译：均衡器包括：复制产生装置，用于通过对接收到的信号应用自适应滤波器来产生多径分量的副本; 去除装置，用于生成多径分量去除信号，通过从接收信号中减去复制品，从该多路径分量去除信号已经去除了多路径分量; 相关值计算装置，用于计算接收信号和副本之间的相关值; 用于计算复制品的功率值的功率值计算装置; 确定装置，用于基于所述相关值和所述功率值来确定所述副本是否是所述多路径分量的副本; 以及选择装置，用于当确定副本是多路径分量的副本时输出多路径分量去除信号，并且当确定副本不是多路径分量的副本时，输出接收的信号。

5. 发明申请

US20100080316A1 INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, DISPLAY APPARATUS AND INFORMATION PROCESSING PROGRAM 有权
标题翻译：信息处理装置，信息处理方法，显示装置和信息处理程序
公开(公告)号：US20100080316A1
公开(公告)日：2010-04-01
申请号：US12568783
申请日：2009-09-29
申请人： Masayuki HATTORI , Takashi Yokokawa , Hidetoshi Kawauchi , Hiroyuki Kamata , Ryoji Ikegaya
发明人： Masayuki HATTORI , Takashi Yokokawa , Hidetoshi Kawauchi , Hiroyuki Kamata , Ryoji Ikegaya
IPC分类号： H04L12/26 , H04B7/02
CPC分类号： H04L27/2656 , H04L27/2665
摘要： Disclosed herein is an information processing apparatus including: a demodulation FFT processing section configured to carry out an FFT process on a demodulation-related signal extracted by making use of a demodulation FFT window from every symbol of a received OFDM signal and output the frequency-domain signal; a control FFT processing section configured to carry out a process equivalent to an FFT process on a control-related signal extracted by making use of a control FFT window from every symbol of the received OFDM signal and output the frequency-domain signal; a transmission-line information estimation section; an equalization section; a reception-quality computation/comparison section; and an FFT-window position control section configured to control the demodulation FFT window to be used by the demodulation FFT processing section and the control FFT window to be used by the control FFT processing section on the basis of a comparison result produced by the reception-quality computation/comparison section.
摘要翻译：这里公开了一种信息处理装置，包括：解调FFT处理部，被配置为对通过使用来自接收的OFDM信号的每个符号的解调FFT窗口提取的解调相关信号执行FFT处理，并输出频域信号; 控制FFT处理部，被配置为执行与通过利用来自所接收的OFDM信号的每个符号的控制FFT窗口提取的控制相关信号上的FFT处理相当的处理，并输出频域信号; 传输线信息估计部; 均衡部分接收质量计算/比较部分; FFT窗口位置控制部分，被配置为基于由接收模式产生的比较结果来控制由解调FFT处理部分使用的解调FFT窗口和要由控制FFT处理部件使用的控制FFT窗口，质量计算/比较部分。

6. 发明授权

US08279956B2 Information processing apparatus, information processing method, display apparatus and information processing program 有权
标题翻译：信息处理装置，信息处理方法，显示装置和信息处理程序
公开(公告)号：US08279956B2
公开(公告)日：2012-10-02
申请号：US12568783
申请日：2009-09-29
申请人： Masayuki Hattori , Takashi Yokokawa , Hidetoshi Kawauchi , Hiroyuki Kamata , Ryoji Ikegaya
发明人： Masayuki Hattori , Takashi Yokokawa , Hidetoshi Kawauchi , Hiroyuki Kamata , Ryoji Ikegaya
IPC分类号： H04K1/10
CPC分类号： H04L27/2656 , H04L27/2665
摘要： Disclosed herein is an information processing apparatus including: a demodulation FFT processing section configured to carry out an FFT process on a demodulation-related signal extracted by making use of a demodulation FFT window from every symbol of a received OFDM signal and output the frequency-domain signal; a control FFT processing section configured to carry out a process equivalent to an FFT process on a control-related signal extracted by making use of a control FFT window from every symbol of the received OFDM signal and output the frequency-domain signal; a transmission-line information estimation section; an equalization section; a reception-quality computation/comparison section; and an FFT-window position control section configured to control the demodulation FFT window to be used by the demodulation FFT processing section and the control FFT window to be used by the control FFT processing section on the basis of a comparison result produced by the reception-quality computation/comparison section.
摘要翻译：这里公开了一种信息处理装置，包括：解调FFT处理部，被配置为对通过使用来自接收的OFDM信号的每个符号的解调FFT窗口提取的解调相关信号执行FFT处理，并输出频域信号; 控制FFT处理部，被配置为执行与通过利用来自所接收的OFDM信号的每个符号的控制FFT窗口提取的控制相关信号上的FFT处理相当的处理，并输出频域信号; 传输线信息估计部; 均衡部分接收质量计算/比较部分; FFT窗口位置控制部分，被配置为基于由接收模式产生的比较结果来控制由解调FFT处理部分使用的解调FFT窗口和要由控制FFT处理部件使用的控制FFT窗口，质量计算/比较部分。

7. 发明申请

US20120110415A1 DECODING APPARATUS, METHOD, AND PROGRAM 审中-公开
标题翻译：解码设备，方法和程序
公开(公告)号：US20120110415A1
公开(公告)日：2012-05-03
申请号：US13238397
申请日：2011-09-21
申请人： Takashi Yokokawa , Osamu Shinya , Yutaka Nakada , Ryoji Ikegaya
发明人： Takashi Yokokawa , Osamu Shinya , Yutaka Nakada , Ryoji Ikegaya
IPC分类号： G11C29/42 , G06F11/10
CPC分类号： H03M13/152 , H03M13/65 , H03M13/6502
摘要： The present disclosure provides a decoding apparatus including, a storage section configured to store a reception value, a detection section configured to detect an error in the reception value, an error correction section configured to correct an error detected by the detection section with respect to the reception value, and a control section configured to control reading of the reception value from the storage section, wherein the control section controls first reading such that the reception value is read into the detection section and, after detection of an error by the detection section, second reading such that substantially the same reception value as that in the first reading is read into the error correction section.
摘要翻译：本公开提供了一种解码装置，包括：存储部，被配置为存储接收值;检测部，被配置为检测接收值中的误差;纠错部，被配置为校正由所述检测部检测到的相对于接收值，以及控制部，其被配置为控制从所述存储部读取接收值，其中，所述控制部控制第一读取，使得所述接收值被读入所述检测部，并且在检测部检测到错误之后，第二读取使得与第一读取中基本上相同的接收值被读入错误校正部分。

8. 发明申请

US20100299572A1 DATA PROCESSING APPARATUS AND DATA PROCESSING METHOD AS WELL AS ENCODING APPARATUS AND ENCODING METHOD 有权
标题翻译：数据处理设备和数据处理方法，如编码设备和编码方法
公开(公告)号：US20100299572A1
公开(公告)日：2010-11-25
申请号：US12743649
申请日：2008-11-18
申请人： Takashi Yokokawa , Makiko Yamamoto , Satoshi Okada , Ryoji Ikegaya
发明人： Takashi Yokokawa , Makiko Yamamoto , Satoshi Okada , Ryoji Ikegaya
IPC分类号： H03M13/05 , G06F11/10
CPC分类号： H04L27/3416 , H03M13/036 , H03M13/1165 , H03M13/255 , H03M13/271 , H03M13/356 , H03M13/6552 , H04L1/0057 , H04L1/0071 , H04L27/3488 , H04L27/36
摘要： A data processing apparatus, a data processing method, an encoding apparatus and an encoding method which can be applied, for example, to a transmission system for transmitting an LDPC code and so forth, and which can improve the tolerance to errors. Of an LDPC code which is prescribed in the DVB-S.2 and has a code length of 64,800 and an encoding rate of ⅔, mb code bits are replaced, and the code bits after the replacement become symbol bits of b symbols. When m is 8 and b is 2, where the i+1th bit from the most significant bit of 8×2 code bits and 8×2 symbol bits of two successive symbols are represented by bi and yi, respectively, replacement of allocating b0 to y15, b1 to y7, b2 to y1, b3 to y5, b4 to y6, b5 to y13, b6 to y11, b7 to y9, b8 to y8, b9 to y14, b10 to y12, b11 to y3, b12 to y0, b13 to y10, b14 to y4 and b15 to y2.
摘要翻译：可以应用于例如用于发送LDPC码等的传输系统的数据处理装置，数据处理方法，编码装置和编码方法，并且可以提高对误差的容限。在DVB-S.2中规定的并且具有64,800的码长和an的编码率的LDPC码中，替换mb个码比特，并且替换后的码比特成为b符号的符号比特。当m为8且b为2时，分别用b 1和y i表示从8×2码位的最高有效位和2个连续符号的8×2符号位的第i + 1位，将b0分配给 y15，b1〜y7，b2〜y1，b3〜y5，b4〜y6，b5〜y13，b6〜y11，b7〜y9，b8〜y8，b9〜y14，b10〜y12，b11〜y3，b12〜y0， b13〜y10，b14〜y4，b15〜y2。

9. 发明申请

US20100275101A1 DATA PROCESSING APPARATUS AND DATA PROCESSING METHOD 有权
标题翻译：数据处理设备和数据处理方法
公开(公告)号：US20100275101A1
公开(公告)日：2010-10-28
申请号：US12744400
申请日：2008-11-26
申请人： Takashi Yokokawa , Makiko Yamamoto , Satoshi Okada , Lui Sakai , Ryoji Ikegaya
发明人： Takashi Yokokawa , Makiko Yamamoto , Satoshi Okada , Lui Sakai , Ryoji Ikegaya
IPC分类号： H03M13/05 , G06F11/10
CPC分类号： H03M13/1165 , H03M13/036 , H03M13/255 , H03M13/2703 , H03M13/271 , H03M13/6552 , H04L1/0057 , H04L1/0071 , H04L27/3416 , H04L27/3488
摘要： The present invention relates to a data processing apparatus and a data processing method which can improve the tolerance to errors of data. A demultiplexer replaces, in accordance with an allocation rule for allocating code bits of an LDPC code to symbol bits representative of symbols, mb bits from among the code bits and sets the code bits after the replacement as symbol bits of b symbols. According to the allocation rule, where groups into which the code bits and the symbol bits are to be grouped in response to an error probability thereof are set as code bit groups and symbol bit groups, respectively, a combination of any of the code bit groups and the symbol bit group of the symbol bits to which the code bits of the code bit group are to be allocated and bit numbers of the code bits and the symbols bits are prescribed.
摘要翻译：数据处理装置和数据处理方法技术领域本发明涉及一种数据处理装置和数据处理方法，其可以提高对数据的误差的容忍度。解复用器根据用于分配LDPC码的码位的分配规则替换代表码元的符号位，并从代码比特中取代mb比特，并将替换后的码比特设置为b符号的符号比特。根据分配规则，分别将代码比特和符号比特的组合作为码比特组和符号比特组分别设定为组合的任何编码比特组以及要分配码位组的码位的符号位的符号位组，以及代码位和符号位的位编号。

10. 发明授权

US08578237B2 Data processing apparatus and data processing method 有权
标题翻译：数据处理装置及数据处理方法
公开(公告)号：US08578237B2
公开(公告)日：2013-11-05
申请号：US12744400
申请日：2008-11-26
申请人： Takashi Yokokawa , Makiko Yamamoto , Satoshi Okada , Lui Sakai , Ryoji Ikegaya
发明人： Takashi Yokokawa , Makiko Yamamoto , Satoshi Okada , Lui Sakai , Ryoji Ikegaya
IPC分类号： H03M13/00
CPC分类号： H03M13/1165 , H03M13/036 , H03M13/255 , H03M13/2703 , H03M13/271 , H03M13/6552 , H04L1/0057 , H04L1/0071 , H04L27/3416 , H04L27/3488
摘要： The present invention relates to a data processing apparatus and a data processing method which can improve the tolerance to errors of data. A demultiplexer replaces, in accordance with an allocation rule for allocating code bits of an LDPC code to symbol bits representative of symbols, mb bits from among the code bits and sets the code bits after the replacement as symbol bits of b symbols. According to the allocation rule, where groups into which the code bits and the symbol bits are to be grouped in response to an error probability thereof are set as code bit groups and symbol bit groups, respectively, a combination of any of the code bit groups and the symbol bit group of the symbol bits to which the code bits of the code bit group are to be allocated and bit numbers of the code bits and the symbols bits are prescribed.
摘要翻译：数据处理装置和数据处理方法技术领域本发明涉及一种数据处理装置和数据处理方法，其可以提高对数据的误差的容忍度。解复用器根据用于分配LDPC码的码位的分配规则替换代表码元的符号位，并从代码比特中取代mb比特，并将替换后的码比特设置为b符号的符号比特。根据分配规则，分别将代码比特和符号比特的组合作为码比特组和符号比特组分别设定为组合的任何编码比特组以及要分配码位组的码位的符号位的符号位组，以及代码位和符号位的位编号。

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