专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

DE3686196D1 未知
公开(公告)号：DE3686196D1
公开(公告)日：1992-09-03
申请号：DE3686196
申请日：1986-05-12
申请人： HITACHI LTD , HITACHI ELECTRONICS
发明人： UMEMOTO MASUO , ETO YOSHIZUMI , MIYAZAKI SHINICHI , KANADA HIDEHIRO , KATAYAMA HITOSHI , MICHIKAWA YUICHI
IPC分类号： G11B5/86 , H04N9/80 , H04N9/804 , H04N9/808
摘要： @ A digital recording and reproducing system wherein luminance signals digitized and converted into the low speed signals and chrominance signals digitized at the time of the recording are distributed among the plural number of channels such as 5 channels for example; the signals of these plural number of channels are recorded respectively in a recording medium; at the time of the reproduction, the signals of the plural number of the channels reproduced respectively from said recording medium are combined into the luminance signals and the chrominance signals respectively; the luminance signals in said combined signals are converted into a high speed signal; and output terminals forthe dubbing of the signals are led from outputsides of a low speed-to-high speed converter and of a channel combination circuit.

2. 发明专利

DE2458679A1 未知
公开(公告)号：DE2458679A1
公开(公告)日：1975-07-24
申请号：DE2458679
申请日：1974-12-11
申请人： HITACHI ELECTRONICS , HITACHI LTD
发明人： FUKINUKI TAKAHIKO , ETO YOSHIZUMI
IPC分类号： H04N1/413 , H04N1/415 , H04N1/00
摘要： In a transmission system in which two-level picture signal is divided into blocks, each having a predetermined number of picture elements, the pieces of signal contained in the respective blocks are converted to a predetermined number of codes, and the codes are converted to modulated signals having different levels or phase, the modulator circuit is so designed that any two modulated signals causing the shifting of the contour of picture may be converted to two signals having adjacent levels or phases, so as to minimize the degradation of the quality of the reproduced picture due to code errors caused during transmission.

3. 发明专利

DE3686196T2 未知
公开(公告)号：DE3686196T2
公开(公告)日：1993-01-14
申请号：DE3686196
申请日：1986-05-12
申请人： HITACHI LTD , HITACHI ELECTRONICS
发明人： UMEMOTO MASUO , ETO YOSHIZUMI , MIYAZAKI SHINICHI , KANADA HIDEHIRO , KATAYAMA HITOSHI , MICHIKAWA YUICHI
IPC分类号： G11B5/86 , H04N9/80 , H04N9/804 , H04N9/808
摘要： @ A digital recording and reproducing system wherein luminance signals digitized and converted into the low speed signals and chrominance signals digitized at the time of the recording are distributed among the plural number of channels such as 5 channels for example; the signals of these plural number of channels are recorded respectively in a recording medium; at the time of the reproduction, the signals of the plural number of the channels reproduced respectively from said recording medium are combined into the luminance signals and the chrominance signals respectively; the luminance signals in said combined signals are converted into a high speed signal; and output terminals forthe dubbing of the signals are led from outputsides of a low speed-to-high speed converter and of a channel combination circuit.

4. 发明专利

DE3539182A1 未知
公开(公告)号：DE3539182A1
公开(公告)日：1986-05-07
申请号：DE3539182
申请日：1985-11-05
申请人： HITACHI LTD , HITACHI ELECTRONICS
发明人： UMEMOTO MASUO , ETO YOSHIZUMI , KANADA HIDEHIRO , ROKUDA MORITO
IPC分类号： G11B20/10 , G11B20/12 , G11B27/30 , H04L7/00 , H04N5/956 , G11B5/09 , G06F9/32 , H04N5/93
摘要： Number data affixed to individual digital data divided into a plurality of data blocks are sequentially read out from a recording medium to be used for determining the write-in positions of the digital data in a memory. For determining the write-in positions of the digital data, the number data of the next write-in position is estimated on the basis of the number data of the current write-in position. Judgment is made as to whether or not the number of times of continuous non-coincidence between the estimated number data and the successively read-out number data exceeds a predetermined setting, and, also judgment is made as to whether or not the number data read out each time falls within a predetermined range. Depending on the results of these judgments, one of the read-out number data and the estimated number data is selected to determine the next write-in position.

5. 发明专利

DE2411162A1 未知
公开(公告)号：DE2411162A1
公开(公告)日：1974-09-19
申请号：DE2411162
申请日：1974-03-08
申请人： HITACHI ELECTRONICS , HITACHI LTD
发明人： SATO KAZUHIRO , ISHIBASHI SHIZUKA , ETO YOSHIZUMI
IPC分类号： H04N5/228 , H04N5/235 , H04N5/21
摘要： A method of and an apparatus for controlling the amount of the electron beam in a photoconduction type image pickup tube in which the signal corresponding to the return beam from the photoelectric conversion plane is detected, the detected signal is compared with a reference signal and amplified, and the resulting signal is applied to the scanning electron beam current control electrode. By appropriately determining a plurality of circuit constants the return beam can be maintained approximately at a constant value independently of the amount of light incident upon the photoelectric conversion plane.

6. 发明专利

DE3579008D1 未知
公开(公告)号：DE3579008D1
公开(公告)日：1990-09-13
申请号：DE3579008
申请日：1985-01-30
申请人： HITACHI LTD , HITACHI ELECTRONICS
发明人： MITA SEIICHI , IZUMITA MORISHI , UMEMOTO MASUO , ETO YOSHIZUMI , ROKUDA MORITO , KANADA HIDEHIRO
IPC分类号： H04L25/49 , G11B20/14 , H04N5/91 , H04N5/92 , H03M5/14
摘要： In the code modulation system for converting code words into code weights by providing M code words among N code words assigned to input data with stairlike code weights on the basis of the input levels, (N-M) code words (a, b, c, d) which are the difference between said N code words and said M code words are respectively disposed near transition points (a, β, y, 5) where said stairlike code weight is changed, and the code weights are provided with hysteresis in the ascent process and the descent process of the input data level.

7. 发明专利

GB2168183B DIGITAL DATA PLAYBACK SYSTEM 未知
公开(公告)号：GB2168183B
公开(公告)日：1988-09-01
申请号：GB8526814
申请日：1985-10-31
申请人： HITACHI LTD , HITACHI ELECTRONICS
发明人： UMEMOTO MASUO , ETO YOSHIZUMI , KANADA HIDEHIRO , ROKUDA MORITO
IPC分类号： G11B20/10 , G11B20/12 , G11B27/30 , H04L7/00 , H04N5/956 , G06F12/02 , G11C8/00 , H04N5/91
摘要： Number data affixed to individual digital data divided into a plurality of data blocks are sequentially read out from a recording medium to be used for determining the write-in positions of the digital data in a memory. For determining the write-in positions of the digital data, the number data of the next write-in position is estimated on the basis of the number data of the current write-in position. Judgment is made as to whether or not the number of times of continuous non-coincidence between the estimated number data and the successively read-out number data exceeds a predetermined setting, and, also judgment is made as to whether or not the number data read out each time falls within a predetermined range. Depending on the results of these judgments, one of the read-out number data and the estimated number data is selected to determine the next write-in position.

8. 发明专利

CA1228926A CODE MODULATION SYSTEM 未知
公开(公告)号：CA1228926A
公开(公告)日：1987-11-03
申请号：CA473253
申请日：1985-01-31
申请人： HITACHI LTD , HITACHI ELECTRONICS
发明人： MITA SEIICHI , IZUMITA MORISHI , UMEMOTO MASUO , ETO YOSHIZUMI , ROKUDA MORITO , KANADA HIDEHIRO
IPC分类号： H04L25/49 , G11B20/14 , H04N5/91 , H04N5/92 , H03M5/04 , G11B20/10 , H04N5/782
摘要： In the code modulation system for converting input data levels into an output signal in the form of code words by providing M input levels among N input levels assigned to input data with stairlike code weights on the basis of the input levels, (N-M) input levels which are the difference between said N input levels and said M input levels are respectively disposed near transition points where said stairlike code weight is changed, and the code weights are provided with hysteresis in the ascent process and the descent process of the input data level.

9. 发明专利

GB2168183A DIGITAL DATA PLAYBACK SYSTEM 未知
公开(公告)号：GB2168183A
公开(公告)日：1986-06-11
申请号：GB8526814
申请日：1985-10-31
申请人： HITACHI LTD , HITACHI ELECTRONICS
发明人： UMEMOTO MASUO , ETO YOSHIZUMI , KANADA HIDEHIRO , ROKUDA MORITO
IPC分类号： G11B20/10 , G11B20/12 , G11B27/30 , H04L7/00 , H04N5/956 , G06F12/02 , G11C8/00 , H04N5/91
摘要： Number data affixed to individual digital data divided into a plurality of data blocks are sequentially read out from a recording medium to be used for determining the write-in positions of the digital data in a memory. For determining the write-in positions of the digital data, the number data of the next write-in position is estimated on the basis of the number data of the current write-in position. Judgment is made as to whether or not the number of times of continuous non-coincidence between the estimated number data and the successively read-out number data exceeds a predetermined setting, and, also judgment is made as to whether or not the number data read out each time falls within a predetermined range. Depending on the results of these judgments, one of the read-out number data and the estimated number data is selected to determine the next write-in position.

10. 发明专利

DE3523249A1 未知
公开(公告)号：DE3523249A1
公开(公告)日：1986-01-09
申请号：DE3523249
申请日：1985-06-28
申请人： HITACHI LTD , HITACHI ELECTRONICS
发明人： DOI NOBUKAZU , IZUMITA MORISHI , MITA SEIICHI , ETO YOSHIZUMI , ROKUDA MORITE
IPC分类号： G06F11/10 , H03M13/27 , H03M13/29 , H03M13/00
摘要： The present invention relates to a method and an apparatus for decoding double-encoding codes in which the information to be decoded comprises a first data and a second data. The operation for decoding double-encoding codes is achieved through two stages. A decoder of the first stage checks the first data, and when an error is found in the first data, all symbols of the first data are assumed to be wrong. The first-stage decoder then adds an erasure flag to all symbols to generate erasure symbols. As a result, these erasure symbols include the symbols which are actually erroneous and those which are correct. A decoder of the second stage is used to perform an error correction on the second data. For this purpose, the second-stage decoder detects the number of erasure symbols which are contained in the second data and which are actually erroneous. If the number of actually erroneous symbols does not exceed the maximum number of correctable symbols which can be corrected by the decoder of the second stage, the error correction is effected; otherwise, the decoder detects an error without conducting the error correction.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式