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    • 5. 发明专利
    • Power supply facility and management method therefor
    • 电力设施及其管理方法
    • JP2003271233A
    • 2003-09-26
    • JP2002075387
    • 2002-03-19
    • Hitachi Ltd株式会社日立製作所
    • GOTO JINICHIROSEKIHARA TAKASHIFURUKAWA MASAO
    • G05B23/02
    • PROBLEM TO BE SOLVED: To solve problems in managing a distributed power supply facility reliably. SOLUTION: A distributed power supply management apparatus 4 attached to a distributed power supply 1 which can be detached and exchanged, a diagnosis apparatus 5 attached to inside the management apparatus 4 which can be detached and exchanged, and a recording medium 6, are provided. When taking out a recorded content in the diagnosis apparatus and the recording medium, a replacement of the management apparatus 4 is attached to the distributed power supply to continue to operate the distributed power source, and recorded information is taken out from the detached management apparatus 4 to help management. COPYRIGHT: (C)2003,JPO
    • 解决问题:可靠地解决管理分布式供电设备的问题。 解决方案:安装在能分离和更换的分布式电源1上的分布式电源管理装置4,安装在管理装置4的内部,可拆卸和交换的诊断装置5,以及记录介质6, 被提供。 当在诊断装置和记录介质中取出记录的内容时,管理装置4的更换被附接到分布式电源以继续操作分布式电源,并且从分离的管理装置4中取出记录的信息 帮助管理。 版权所有(C)2003,JPO
    • 8. 发明专利
    • DATA TRANSFER CONTROLLER AND DATA TRANSFER SYSTEM
    • JPH1011391A
    • 1998-01-16
    • JP18669596
    • 1996-06-27
    • HITACHI LTD
    • IIZUKA TAKUYAFURUKAWA MASAO
    • G06F13/38
    • PROBLEM TO BE SOLVED: To transfer data with wide data width by using a narrow data transfer path for data and a small number of signal lines for management. SOLUTION: An encoder A stores the high-order and low-order parts of (n)th data which are already transferred from a vector processor to a buffer, and a comparing circuit r1 compares the high-order and low-order parts of the data in the buffer with the high-order and low-order parts of (n+1)th data to be transferred; and a comparison information generating circuit r2 generates comparison information (C-1, C-2) according to the comparison result and a selector r3 selects and transfers only the high-order part, only the low-order part, or the high order part and low-order part of the (n+1)th data to a decoder in order according to the comparison information. The decoder B stores the high-order and low-order parts fo the (n)th data which are already transferred in the buffer, updates or holds the data in the buffer with the high-order part, low-order part, or both the parts of the data of the (n+1)th data transferred according to the comparison information, and then outputs the data in the buffer according to the comparison information.
    • 9. 发明专利
    • VECTOR PROCESSOR
    • JPH09274612A
    • 1997-10-21
    • JP11023796
    • 1996-04-05
    • HITACHI LTD
    • KOGA MIHOKOTAMAOKI YOSHIKOFURUKAWA MASAO
    • G06F17/16
    • PROBLEM TO BE SOLVED: To shorten set time by directly performing the set of scalar data to a scalar register at a vector processor corresponding to a vector instruction. SOLUTION: As a pair of vector instructions, a VLI instruction for setting immediate value data to the low-order 32 bits of the scalar register and a VLIS instruction for setting immediate value data to the high-order 32 bits of the scalar register are prepared, these instructions are composed of OP codes, scalar register numbers to be set and immediate data and by decoding the instructions, the immediate value data are set to the low-order side of register 2371 and the high-order side of a register 2372 at a data control circuit. When executing the instruction, in the case of VLI instruction, the data in the register 2371 are selected and these data are written in the scalar register to be set by a selection circuit. In the case of VLIS instruction, the data in the register 2372 are selected and the data are written in the scalar register to be set by the selection circuit but only the high-order part of data is written corresponding to the designation of a set signal control circuit.