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1. 发明申请

US20080225178A1 AUTOMATIC SIGNAL GAIN CONTROL METHOD AND APPARATUS 审中-公开
标题翻译：自动信号增益控制方法和装置
公开(公告)号：US20080225178A1
公开(公告)日：2008-09-18
申请号：US11830021
申请日：2007-07-30
申请人： Deuk-geun AHN , Kyoung-hwan Kim , Sang-min Hong
发明人： Deuk-geun AHN , Kyoung-hwan Kim , Sang-min Hong
IPC分类号： H04N5/08 , H04L27/08
CPC分类号： H04L27/08 , H04N5/08
摘要： Provided are an automatic signal gain control method and apparatus that adaptively controls signal gain according to sync tip depths in a video receiving system. The method includes: detecting a sync signal from a video signal; detecting a blank level and a sync tip level from a sync section of the sync signal; extracting a difference between the blank level and the sync tip level, as a sync tip depth; and controlling the gain of the video signal differently according to a variation of the sync tip depth.
摘要翻译：提供了一种自动信号增益控制方法和装置，其根据视频接收系统中的同步尖端深度自适应地控制信号增益。该方法包括：从视频信号中检测同步信号; 从所述同步信号的同步部分检测空白电平和同步尖端电平; 提取空白电平和同步尖端电平之间的差作为同步尖端深度; 并且根据同步尖端深度的变化来不同地控制视频信号的增益。

2. 发明授权

US06392369B1 Digital realtime convergence correction circuit and method thereof 失效
标题翻译：数字实时会聚校正电路及其方法
公开(公告)号：US06392369B1
公开(公告)日：2002-05-21
申请号：US09850542
申请日：2001-05-07
申请人： Kyoung-hwan Kim
发明人： Kyoung-hwan Kim
IPC分类号： H01J2970
CPC分类号： H04N9/28
摘要： A convergence correction circuit including a coordinate unit which sets a predetermined range with first level values according to a screen length; an interval unit which divides the screen length; an interval decoder which calculates the value of the branch point of each interval determined by the interval unit; an interval gain unit which stores the gain of each interval; a subtracter which subtracts the output of the coordinate unit from the output of the interval decoder; a multiplier which multiplies the output of the subtracter by the output of the interval gain unit; a level shifter which sets an initial and last value of each interval upon horizontal scanning; an adder which adds the output of the multiplier and the output of the level shifter; a digital-analog converter which converts the output of the adder; and a correction coil which corrects the convergence according to the converted output.
摘要翻译：一种会聚校正电路，包括：坐标单元，其根据屏幕长度设定具有第一电平值的预定范围; 分隔屏幕长度的间隔单元; 间隔解码器，其计算由间隔单元确定的每个间隔的分支点的值; 间隔增益单元，其存储每个间隔的增益; 减法器，其从间隔解码器的输出中减去坐标单位的输出; 乘法器，将减法器的输出乘以间隔增益单元的输出; 电平移位器，其在水平扫描时设定每个间隔的初始值和最后值; 加法器，其将乘法器的输出和电平移位器的输出相加; 一个转换加法器的输出的数模转换器; 以及校正线圈，其根据转换的输出校正收敛。

3. 发明授权

US07408219B2 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US07408219B2
公开(公告)日：2008-08-05
申请号：US11099658
申请日：2005-04-06
申请人： Tea-kwang Yu , Weon-ho Park , Kyoung-hwan Kim , Kwang-tae Kim
发明人： Tea-kwang Yu , Weon-ho Park , Kyoung-hwan Kim , Kwang-tae Kim
IPC分类号： H01L29/788
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11524
摘要： In a nonvolatile semiconductor memory device, and a method of fabricating the same, the nonvolatile semiconductor memory device includes a cell doping region and source/drain regions in a semiconductor substrate, the cell doping region being doped as a first conductive type, a channel region disposed between the source/drain regions in the semiconductor substrate, a tunnel doping region of the first conductive type formed in a predetermined region of an upper portion of the cell doping region, the tunnel doping region being doped in a higher concentration than that of the cell doping region, a tunnel insulating layer formed on a surface of the semiconductor substrate on the tunnel doping region, a gate insulating layer surrounding the tunnel insulating layer and covering the channel region and the cell doping region exposed beyond the tunnel doping region, and a gate electrode covering the tunnel insulating layer and on the gate insulating layer.
摘要翻译：在非易失性半导体存储器件及其制造方法中，非易失性半导体存储器件包括半导体衬底中的单元掺杂区域和源极/漏极区域，该单元掺杂区域被掺杂为第一导电类型，沟道区域设置在半导体衬底中的源极/漏极区之间，形成在电池掺杂区的上部的预定区域中的第一导电类型的隧道掺杂区，掺杂浓度高于在隧道掺杂区域上形成在半导体衬底的表面上的隧道绝缘层，围绕隧道绝缘层并覆盖沟道区域的栅极绝缘层和暴露在隧道掺杂区域外的电池掺杂区域，以及栅电极覆盖隧道绝缘层和栅极绝缘层。

4. 发明申请

US20080293200A1 Method of fabricating nonvolatile semiconductor memory device 审中-公开
标题翻译：制造非易失性半导体存储器件的方法
公开(公告)号：US20080293200A1
公开(公告)日：2008-11-27
申请号：US12219995
申请日：2008-07-31
申请人： Tea-kwang Yu , Weon-ho Park , Kyoung-hwan Kim , Kwang-tae Kim
发明人： Tea-kwang Yu , Weon-ho Park , Kyoung-hwan Kim , Kwang-tae Kim
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11524
摘要： In a nonvolatile semiconductor memory device, and a method of fabricating the same, the nonvolatile semiconductor memory device includes a cell doping region and source/drain regions in a semiconductor substrate, the cell doping region being doped as a first conductive type, a channel region disposed between the source/drain regions in the semiconductor substrate, a tunnel doping region of the first conductive type formed in a predetermined region of an upper portion of the cell doping region, the tunnel doping region being doped in a higher concentration than that of the cell doping region, a tunnel insulating layer formed on a surface of the semiconductor substrate on the tunnel doping region, a gate insulating layer surrounding the tunnel insulating layer and covering the channel region and the cell doping region exposed beyond the tunnel doping region, and a gate electrode covering the tunnel insulating layer and on the gate insulating layer.
摘要翻译：在非易失性半导体存储器件及其制造方法中，非易失性半导体存储器件包括半导体衬底中的单元掺杂区域和源极/漏极区域，该单元掺杂区域被掺杂为第一导电类型，沟道区域设置在半导体衬底中的源极/漏极区之间，形成在电池掺杂区的上部的预定区域中的第一导电类型的隧道掺杂区，掺杂浓度高于在隧道掺杂区域上形成在半导体衬底的表面上的隧道绝缘层，围绕隧道绝缘层并覆盖沟道区域的栅极绝缘层和暴露在隧道掺杂区域外的电池掺杂区域，以及栅电极覆盖隧道绝缘层和栅极绝缘层。

5. 发明申请

US20080190127A1 Refrigerator and control method thereof 审中-公开
标题翻译：冰箱及其控制方法
公开(公告)号：US20080190127A1
公开(公告)日：2008-08-14
申请号：US11878914
申请日：2007-07-27
申请人： Yong-ik Cho , Gi-hyeong Lee , Gyu-hwan An , Kyoung-hwan Kim
发明人： Yong-ik Cho , Gi-hyeong Lee , Gyu-hwan An , Kyoung-hwan Kim
IPC分类号： F25D3/00 , F25B49/00 , F25D23/00
CPC分类号： F25D29/00 , F25D23/12 , F25D2400/36
摘要： A refrigerator includes a main body cabinet having a storage room formed with a front opening, a door which opens and closes the front opening, and a display unit that is mounted on at least one of the main body cabinet and the door. The display unit includes a display displaying an image, a power supply unit selectively supplying power to the display, a temperature detector detecting a temperature of the display, and a controller controlling the power supply unit to interrupt the power supplied to the display when the temperature detected by the temperature detector is higher than a predetermined maximum temperature.
摘要翻译：冰箱包括具有形成有前开口的储藏室的主体机壳和打开和关闭前开口的门以及安装在主体柜和门的至少一个上的显示单元。显示单元包括显示图像的显示器，向显示器选择性地供电的电源单元，检测显示器的温度的温度检测器和控制供电单元的控制器，以在中断供给显示器的电力时由温度检测器检测的温度高于预定的最高温度。

6. 发明申请

US20060006453A1 Nonvolatile semiconductor memory device and method of fabricating the same 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20060006453A1
公开(公告)日：2006-01-12
申请号：US11099658
申请日：2005-04-06
申请人： Tea-kwang Yu , Weon-ho Park , Kyoung-hwan Kim , Kwang-tae Kim
发明人： Tea-kwang Yu , Weon-ho Park , Kyoung-hwan Kim , Kwang-tae Kim
IPC分类号： H01L29/76 , H01L21/8238
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11524
摘要： In a nonvolatile semiconductor memory device, and a method of fabricating the same, the nonvolatile semiconductor memory device includes a cell doping region and source/drain regions in a semiconductor substrate, the cell doping region being doped as a first conductive type, a channel region disposed between the source/drain regions in the semiconductor substrate, a tunnel doping region of the first conductive type formed in a predetermined region of an upper portion of the cell doping region, the tunnel doping region being doped in a higher concentration than that of the cell doping region, a tunnel insulating layer formed on a surface of the semiconductor substrate on the tunnel doping region, a gate insulating layer surrounding the tunnel insulating layer and covering the channel region and the cell doping region exposed beyond the tunnel doping region, and a gate electrode covering the tunnel insulating layer and on the gate insulating layer.
摘要翻译：在非易失性半导体存储器件及其制造方法中，非易失性半导体存储器件包括半导体衬底中的单元掺杂区域和源极/漏极区域，该单元掺杂区域被掺杂为第一导电类型，沟道区域设置在半导体衬底中的源极/漏极区之间，形成在电池掺杂区的上部的预定区域中的第一导电类型的隧道掺杂区，掺杂浓度高于在隧道掺杂区域上形成在半导体衬底的表面上的隧道绝缘层，围绕隧道绝缘层并覆盖沟道区域的栅极绝缘层和暴露在隧道掺杂区域外的电池掺杂区域，以及栅电极覆盖隧道绝缘层和栅极绝缘层。

7. 发明授权

US06847176B2 Apparatus and method for removing horizontal moire in cathode-ray tube monitors 失效
标题翻译：用于去除阴极射线管监测器中水平波纹的装置和方法
公开(公告)号：US06847176B2
公开(公告)日：2005-01-25
申请号：US10353598
申请日：2003-01-29
申请人： Kyoung-hwan Kim
发明人： Kyoung-hwan Kim
IPC分类号： G09G1/04 , H04N3/22 , H04N5/21 , H04N5/68
CPC分类号： H04N5/68 , G09G1/04 , H04N3/22 , H04N5/21
摘要： An apparatus and method for removing horizontal moire of a cathode-ray tube (CRT) monitor system, wherein horizontal moire can be completely removed even when the moire that occurs in an upper portion of the monitor is different from the moire that occurs in a lower portion of the monitor. In one aspect of the invention, a method for removing horizontal moire in a cathode ray tube (CRT) monitor comprises generating moire correction data in synchronization with a vertical synchronous signal, the moire correction data comprising a sawtooth waveform, adjusting one of a direct current (DC) component, an alternating current (AC) component, and both the DC and AC component, of the moire correction data, outputting the adjusted moire correction data for every other horizontal scan line in synchronization with an odd-numbered or an even-numbered horizontal synchronous signal, and delaying a horizontal drive signal in response to the output adjusted moire correction data.
摘要翻译：一种用于去除阴极射线管（CRT）监视器系统的水平波纹的装置和方法，其中即使当在监视器的上部发生的莫尔不同于在下部发生的莫尔条纹时，水平波纹也可以被完全去除显示器的一部分。在本发明的一个方面，一种用于去除阴极射线管（CRT）监视器中的水平云纹的方法，包括与垂直同步信号同步地产生莫尔校正数据，该莫尔校正数据包括锯齿波形，调整直流电（DC）分量，交流（AC）分量，以及直线和交流分量两者的莫尔校正数据，与奇数编号或偶数分频同步地输出每隔一个水平扫描线的调整后的莫尔修正数据，并且响应于输出调节的莫尔校正数据延迟水平驱动信号。

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