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1. 发明授权

US5946328A Method and means for efficient error detection and correction in long byte strings using integrated interleaved Reed-Solomon codewords 失效
标题翻译：用于使用集成交错的里德 - 所罗门码字的长字节串中有效的错误检测和校正的方法和装置
公开(公告)号：US5946328A
公开(公告)日：1999-08-31
申请号：US971796
申请日：1997-11-17
申请人： Charles Edwin Cox , Martin Hassner , Ralf Kotter , Arvind Patel
发明人： Charles Edwin Cox , Martin Hassner , Ralf Kotter , Arvind Patel
IPC分类号： G11B20/18 , H03M13/29 , H03M13/00
CPC分类号： H03M13/1515 , G11B20/1833 , H03M13/29 , H03M13/2903
摘要： A method and means for enhancing the error detection and correction capability obtained when a plurality of data byte strings are encoded in a two-level, block-formatted linear code using codeword and block-level redundancy by logically summing the data byte strings and mapping the logical sum and the data byte strings into counterpart codewords including codeword check bytes in accordance with the same linear error correction code. Next, the codewords are logically summed. The codewords and their logical sum are interleaved in a predetermined pattern prior to being recorded on a storage device or the like. On read back, the codewords of a block and their logical sum are syndrome processed to resolve any identified errors within the correction capability of any single word and any errors within the correction capability of any single word and block-level redundancy, and to provide signal indication when the correction capacity has been exceeded.
摘要翻译：一种用于增强当多个数据字节串以二电平块格式化的线性码被编码时使用码字和块级冗余通过对数据字节串进行逻辑求和而映射的方法和装置，逻辑和和数据字节串转换成对应码字，包括根据相同的线性纠错码的码字校验字节。接下来，对码字进行逻辑求和。码字及其逻辑和在被记录在存储设备等之前以预定的模式进行交织。在读回时，块的码字及其逻辑和被校正处理，以解决任何单个字的校正能力内的任何识别的错误以及任何单个字和块级冗余的校正能力内的任何错误，并提供信号超过校正能力时的指示。

2. 发明授权

US5942005A Method and means for computationally efficient error and erasure correction in linear cyclic codes 失效
标题翻译：线性循环码中计算有效误差和消除校正的方法和装置
公开(公告)号：US5942005A
公开(公告)日：1999-08-24
申请号：US838375
申请日：1997-04-08
申请人： Martin Hassner , Ralf Kotter , Tetsuya Tamura
发明人： Martin Hassner , Ralf Kotter , Tetsuya Tamura
IPC分类号： H03M13/00
CPC分类号： H03M13/153 , G11B20/1833 , H03M13/1515 , H03M13/154 , G11B2020/1836 , G11B2020/1843 , G11B2220/2516 , G11B2220/2537 , G11B2220/90 , H03M13/373
摘要： A computationally and storage efficient method and means for correcting errors and erasures in linear cyclic coded data, especially Reed-Solomon codes, in which erasure values are ascertained exclusively as a function of syndromes and derived error location polynomials without recourse to computation of intermediate error or erasure values.
摘要翻译：一种用于校正线性循环编码数据（特别是里德 - 所罗门码）中的错误和擦除的计算和存储有效方法和装置，其中擦除值被唯一地确定为校正子和导出的误差位置多项式的函数，而不需要中间误差的计算或擦除值。

3. 发明授权

US07653862B2 Error detection and correction for encoded data 失效
标题翻译：编码数据的错误检测和校正
公开(公告)号：US07653862B2
公开(公告)日：2010-01-26
申请号：US11154978
申请日：2005-06-15
申请人： Martin Hassner , Rajesh Koul
发明人： Martin Hassner , Rajesh Koul
IPC分类号： H03M13/00 , G11C29/00
CPC分类号： G06F11/1008 , G11B20/10527 , G11B20/1833 , G11B2020/10759 , G11B2220/2516 , H03M13/19
摘要： Embodiments of the present invention provide techniques for detecting and correcting encoded data. In one embodiment, a system for detecting and correcting errors in a plurality of data bits comprises a static memory configured to store a plurality of data bits; a systematic encoder configured to convert the plurality of data bits into a codeword; a systematic parity check encoder configured to convert the codeword into a syndrome; and a syndrome decoder configured to evaluate the syndrome based on preset criteria used to determine whether the syndrome corresponds to an uncorrectable error. A binary [16, 8, 5] code is used to encode the plurality of data bits.
摘要翻译：本发明的实施例提供了用于检测和校正编码数据的技术。在一个实施例中，用于检测和校正多个数据位中的错误的系统包括被配置为存储多个数据位的静态存储器; 被配置为将所述多个数据位转换成码字的系统编码器; 被配置为将所述码字转换为综合征的系统奇偶校验编码器; 以及校正器解码器，其被配置为基于用于确定所述综合征是否对应于不可校正误差的预设标准来评估所述综合征。二进制[16,8,5]代码用于对多个数据位进行编码。

4. 发明授权

US4413251A Method and apparatus for generating a noiseless sliding block code for a (1,7) channel with rate 2/3 失效
标题翻译：用于产生速率为2/3的（1,7）信道的无噪声滑块代码的方法和装置
公开(公告)号：US4413251A
公开(公告)日：1983-11-01
申请号：US283758
申请日：1981-07-16
申请人： Roy L. Adler , Martin Hassner , John P. Moussouris
发明人： Roy L. Adler , Martin Hassner , John P. Moussouris
IPC分类号： H03M7/14 , G06T9/00 , G11B20/14 , H04L25/49 , H03K13/00
CPC分类号： G06T9/005 , G11B20/1426
摘要： An algorithm and the hardware embodiment for producing a run length limited code useful in magnetic recording channels are described. The system described produces sequences which have a minimum of 1 zero and a maximum of 7 zeros between adjacent 1's. The code is generated by a sequential scheme that map 2 bits of unconstrained into 3 bits of constrained data. The encoder is a finite state machine whose internal state description requires 3 bits. It possesses the attractive feature of reset data blocks which reset it to a fixed state. The decoder requires a lookahead of two future channel symbols (6 bits) and its operation is channel state independent. The error propagation due to a random error is 5 bits. The hardware implementation is extremely simple and can operate at very high data speeds.
摘要翻译：描述用于产生在磁记录通道中有用的游程长度有限代码的算法和硬件实施例。所描述的系统产生在相邻1之间具有最少1个零和最多7个零的序列。该代码由将无约束的2位映射到3位受约束数据的顺序方案生成。编码器是一个有限状态机，其内部状态描述需要3位。它具有复位数据块的有吸引力的特征，将其重置为固定状态。解码器需要两个未来通道符号（6位）的前视，其操作是信道状态独立的。由于随机误差引起的误差传播是5位。硬件实现非常简单，可以在非常高的数据速度下运行。

5. 发明申请

US20090254796A1 Techniques for correcting errors and erasures using a single-shot generalized minimum distance key equation solver 有权
标题翻译：使用单次广义最小距离密钥方程求解器纠正错误和擦除的技术
公开(公告)号：US20090254796A1
公开(公告)日：2009-10-08
申请号：US12099532
申请日：2008-04-08
申请人： Martin Hassner , Travis Roger Oenning , Richard Leo Galbraith
发明人： Martin Hassner , Travis Roger Oenning , Richard Leo Galbraith
IPC分类号： H03M13/00
CPC分类号： H03M13/455 , H03M13/1515 , H03M13/1525 , H03M13/154
摘要： A system corrects errors in a codeword. The system includes a channel that sorts reliability numbers of symbols in the codeword to create an ordered list of candidate erasure locations. The system also includes a generalized minimum distance decoder that iteratively processes the ordered list of candidate erasure locations and at least two syndromes of the codeword using a single-shot key equation solver to generate an error locator polynomial and an error evaluator polynomial. The generalized minimum distance decoder processes the least reliable candidate erasure locations first within the ordered list of candidate erasure locations.
摘要翻译：系统校正码字中的错误。该系统包括对码字中的符号的可靠性数量进行排序以创建候选擦除位置的有序列表的信道。该系统还包括广义最小距离解码器，其使用单次密钥方程求解器迭代地处理候选擦除位置的有序列表和码字的至少两个校验子，以生成错误定位器多项式和误差评估器多项式。广义最小距离解码器首先在候选擦除位置的有序列表中处理最不可靠的候选擦除位置。

6. 发明申请

US20090063938A1 Decoding Error Correction Codes Using A Modular Single Recursion Implementation 有权
标题翻译：使用模块化单递归执行解码纠错码
公开(公告)号：US20090063938A1
公开(公告)日：2009-03-05
申请号：US12270737
申请日：2008-11-13
申请人： Martin Hassner , Kirk Hwang
发明人： Martin Hassner , Kirk Hwang
IPC分类号： H03M13/07 , G06F11/10
CPC分类号： H03M13/1525 , H03M13/1515
摘要： Systems and methods are provided for performing error correction decoding. The coefficients of the error locator polynomial are iteratively determined for each codeword using a modular implementation of a single recursion key-equation solver algorithm. According to this implementation, modules are used to calculate the current and previous coefficients of the error locator polynomial. One module is used for each correctable error. The modular single recursion implementation is programmable, because the number of modules can be easily changed to correct any number of correctable errors. Galois field tower arithmetic can be used to calculate the inverse of an error term. Galois field tower arithmetic greatly reduces the size of the inversion unit. The latency time can be reduced by placing the computations of the inverse error term outside the critical path of the error locator polynomial algorithm.
摘要翻译：提供了用于执行纠错解码的系统和方法。使用单个递归密钥方程求解算法的模块化实现，针对每个码字迭代确定误差定位多项式的系数。根据该实现，使用模块来计算误差定位器多项式的当前系数和先前系数。一个模块用于每个可纠正的错误。模块化单递归实现是可编程的，因为可以轻松更改模块数量以更正任何数量的可纠正错误。伽罗瓦域塔算术可用于计算误差项的倒数。伽罗瓦域塔算术大大减小了反演单元的大小。通过将反向误差项的计算置于误差定位多项式算法的关键路径之外，可以减少延迟时间。

7. 发明申请

US20070061688A1 Decoding error correction codes using a modular single recursion implementation 有权
标题翻译：使用模块化单递归实现解码纠错码
公开(公告)号：US20070061688A1
公开(公告)日：2007-03-15
申请号：US11207474
申请日：2005-08-18
申请人： Martin Hassner , Kirk Hwang
发明人： Martin Hassner , Kirk Hwang
IPC分类号： H03M13/00
CPC分类号： H03M13/1525 , H03M13/1515
摘要： Systems and methods are provided for performing error correction decoding. The coefficients of the error locator polynomial are iteratively determined for each codeword using a modular implementation of a single recursion key-equation solver algorithm. According to this implementation, a plurality of modules are used to calculate the current and previous coefficients of the error locator polynomial. One module is used for each correctable error. The modular single recursion implementation is programmable, because the number of modules can be easily changed to correct any number of correctable errors. Galois field tower arithmetic can be used to calculate the inverse of an error term. Galois field tower arithmetic greatly reduces the size of the inversion unit. The latency time can be reduced by placing the computations of the inverse error term outside the critical path of the error locator polynomial algorithm.
摘要翻译：提供了用于执行纠错解码的系统和方法。使用单个递归密钥方程求解算法的模块化实现，针对每个码字迭代确定误差定位多项式的系数。根据该实现，使用多个模块来计算误差定位多项式的当前系数和先前系数。一个模块用于每个可纠正的错误。模块化单递归实现是可编程的，因为可以轻松更改模块数量以更正任何数量的可纠正错误。伽罗瓦域塔算术可用于计算误差项的倒数。伽罗瓦域塔算术大大减小了反演单元的大小。通过将反向误差项的计算置于误差定位多项式算法的关键路径之外，可以减少延迟时间。

8. 发明申请

US20060195769A1 Techniques for performing Galois field logarithms for detecting error locations that require less storage space 失效
公开(公告)号：US20060195769A1
公开(公告)日：2006-08-31
申请号：US11059734
申请日：2005-02-16
申请人： Martin Hassner , Christopher Dudley
发明人： Martin Hassner , Christopher Dudley
IPC分类号： H03M13/00
CPC分类号： H03M13/158 , G11B20/1833 , H03M13/151
摘要： To perform error detection and correction on a data sector, syndromes are calculated and used to determine error values and error locations. Logarithmic calculations in Galois field need to be performed to determine the error locations using the syndromes. Finite field vectors are represented as “complex” numbers of the form Az+B. An algorithm is performed using the field vectors represented as complex numbers to generate the error locations. The algorithm requires the use of logarithm calculations. The results of the logarithmic calculations are looked up in two (or more) log tables. The log tables store all the possible results of the logarithm calculations. The log tables store significantly less bits than prior art techniques, reducing the amount of storage space required by a factor of 171. Techniques for controlling accesses to the log tables in an efficient manner are also provided.

9. 发明授权

US4609907A Dual channel partial response system 失效
标题翻译：双通道部分响应系统
公开(公告)号：US4609907A
公开(公告)日：1986-09-02
申请号：US666842
申请日：1984-10-31
申请人： Roy L. Adler , Peter A. Franaszek , Martin Hassner , Richard C. Schneider
发明人： Roy L. Adler , Peter A. Franaszek , Martin Hassner , Richard C. Schneider
IPC分类号： H03M7/14 , G06T9/00 , G11B20/14 , H03M5/14 , H03M13/23 , H04L25/497 , H03M1/12
CPC分类号： G11B20/1426 , G06T9/005
摘要： Method and apparatus is described for encoding and decoding a stream of randomly distributed binary bits representing digital data, including an encoder for encoding the bit stream to achieve a run length limited, partial response coding of the stream; a recording medium for recording the encoded stream; and a decoding system for recovering timing signals and a stream of data signals separately from the recorded stream using a first channel for decoding the recorded stream to recover a timing signal stream; therefrom; and a second channel for decoding the recorded stream to recover a stream of data signals therefrom.
摘要翻译：描述了用于对表示数字数据的随机分布的二进制比特流进行编码和解码的方法和装置，包括用于编码比特流的编码器，以实现该流的游程长度有限的部分响应编码; 用于记录编码流的记录介质; 以及解码系统，用于使用用于对记录的流进行解码以恢复定时信号流的第一信道来从记录的流中分离地恢复定时信号和数据信号流; 由此; 以及用于解码所记录的流以从其恢复数据信号流的第二信道。

10. 发明授权

US07743311B2 Combined encoder/syndrome generator with reduced delay 有权
标题翻译：具有减少延迟的组合式编码器/综合发生器
公开(公告)号：US07743311B2
公开(公告)日：2010-06-22
申请号：US11341230
申请日：2006-01-26
申请人： Martin Hassner , Kirk Hwang
发明人： Martin Hassner , Kirk Hwang
IPC分类号： H03M13/00
CPC分类号： G11B20/1833 , H03M13/158
摘要： A combined encoder/syndrome generator is provided that has a reduced delay. The combined encoder/syndrome generator generates check symbols during an encoding process and error syndromes during a decoding process. The combined encoder/syndrome generator has two or more blocks. The output of each block is fed as an input into a subsequent block. Each block can perform computations in parallel to reduce the delay of the encoding system.
摘要翻译：提供了具有减少的延迟的组合编码器/校正子发生器。组合的编码器/校正子发生器在解码过程期间在编码处理期间产生校验符号和错误综合征。组合的编码器/校正子发生器具有两个或更多个块。每个块的输出作为输入被馈送到随后的块中。每个块可以并行执行计算，以减少编码系统的延迟。

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