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    • 2. 发明申请
    • Structure and method of measuring the capacitance
    • 测量电容的结构和方法
    • US20070029575A1
    • 2007-02-08
    • US11195633
    • 2005-08-03
    • Hao ZhangYuan-Wei ZhengHui-Fang HsuJuan-Li Liu
    • Hao ZhangYuan-Wei ZhengHui-Fang HsuJuan-Li Liu
    • H01L27/10H01L21/82
    • H01L27/112
    • The structure and method of measuring the capacitance comprising a first buried doped area and a heavily doped area in a semiconductor substrate. The heavily doped area is parallel to the buried doped area. Several second buried doped areas, the first oxide layers and the second oxide layers are formed in the semiconductor substrate. Any of the second buried doped areas is perpendicular to the first buried doped area. One end of the second buried doped area is connected to the first buried doped area, and another end is connected to the heavily doped area. Any of the first oxide layers is overlaid on the second buried doped area. Any of the second oxide layers is placed between any two first oxide layers, and the thickness of the second oxide layer is thinner than the thickness of the first oxide layer. At least two first and several second polysilicon rows are formed on the semiconductor substrate, and wherein two first polysilicon rows are respectively placed on two sides of the second buried doped areas. Any of the second polysilicon rows is perpendicular to the first polysilicon row therein. One end of each of the second polysilicon rows is not connected to two fist polysilicon rows. The structure of the present invention is applied to obtain the individual capacitance in relation to the word line.
    • 测量电容的结构和方法包括半导体衬底中的第一掩埋掺杂区域和重掺杂区域。 重掺杂区域平行于埋入掺杂区域。 几个第二掩埋掺杂区域,第一氧化物层和第二氧化物层形成在半导体衬底中。 第二掩埋掺杂区域中的任一个垂直于第一掩埋掺杂区域。 第二掩埋掺杂区域的一端连接到第一掩埋掺杂区域,另一端连接到重掺杂区域。 任何第一氧化物层被覆盖在第二掩埋掺杂区域上。 任何第二氧化物层被放置在任何两个第一氧化物层之间,并且第二氧化物层的厚度比第一氧化物层的厚度薄。 在半导体衬底上形成至少两个第一和多个第二多晶硅行,并且其中两个第一多晶硅行分别放置在第二掩埋掺杂区的两侧。 任何第二多晶硅行垂直于其中的第一多晶硅行。 每个第二多晶硅行的一端不连接到两个第一多晶硅行。 应用本发明的结构来获得相对于字线的单独电容。
    • 3. 发明授权
    • Sense amplifier for mask read only memory
    • 屏蔽只读存储器的感应放大器
    • US07075843B2
    • 2006-07-11
    • US10968102
    • 2004-10-20
    • Yuan Wei ZhengMeng Yu PanJulian Chang
    • Yuan Wei ZhengMeng Yu PanJulian Chang
    • G11C7/00
    • G11C17/10G11C7/062G11C7/14
    • A sense amplifier for Mask Read Only Memory comprising a multiplexer, a plurality of comparators, a plurality of first selected transistors, and a plurality of second selected transistors. The gates of both first selected transistor and second selected transistor are connected to a word line select. One doping area of the first selected transistor is connected to the multiplexer for generating a plurality of signals, and another doping area is connected to a selected bit line. One doping area of each of the second selected transistor is connected to each of the comparators, and another doping area is connected to an external voltage. A cell voltage status is determined when each of the signals and one of doping areas of the second selected transistors are connected to each of the comparators.
    • 一种用于掩模只读存储器的读出放大器,包括多路复用器,多个比较器,多个第一选择晶体管和多个第二选定晶体管。 第一选择晶体管和第二选择晶体管的栅极连接到字线选择。 第一选择的晶体管的一个掺杂区域连接到多路复用器以产生多个信号,并且另一个掺杂区域连接到所选择的位线。 第二选择晶体管中的每一个的一个掺杂区域连接到每个比较器,并且另一个掺杂区域连接到外部电压。 当每个信号和第二所选晶体管的掺杂区域中的每一个连接到每个比较器时,确定单元电压状态。
    • 4. 发明申请
    • Sense amplifier for mask read only memory
    • 屏蔽只读存储器的感应放大器
    • US20050088880A1
    • 2005-04-28
    • US10968102
    • 2004-10-20
    • Yuan Wei ZhengMeng Yu PanJulian Chang
    • Yuan Wei ZhengMeng Yu PanJulian Chang
    • G11C5/00G11C7/06G11C7/14G11C17/10H01L27/112
    • G11C17/10G11C7/062G11C7/14
    • A sense amplifier for Mask Read Only Memory comprising a multiplexer, a plurality of comparators, a plurality of first selected transistors, and a plurality of second selected transistors. The gates of both first selected transistor and second selected transistor are connected to a word line select. One doping area of the first selected transistor is connected to the multiplexer for generating a plurality of signals, and another doping area is connected to a selected bit line. One doping area of each of the second selected transistor is connected to each of the comparators, and another doping area is connected to an external voltage. A cell voltage status is determined when each of the signals and one of doping areas of the second selected transistors are connected to each of the comparators.
    • 一种用于掩模只读存储器的读出放大器,包括多路复用器,多个比较器,多个第一选择晶体管和多个第二选定晶体管。 第一选择晶体管和第二选择晶体管的栅极连接到字线选择。 第一选择的晶体管的一个掺杂区域连接到多路复用器以产生多个信号,并且另一个掺杂区域连接到所选择的位线。 第二选择晶体管中的每一个的一个掺杂区域连接到每个比较器,并且另一个掺杂区域连接到外部电压。 当每个信号和第二所选晶体管的掺杂区域中的每一个连接到每个比较器时,确定单元电压状态。