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1. 发明授权

US07713432B2 Method and apparatus to improve plasma etch uniformity 有权
标题翻译：提高等离子体蚀刻均匀性的方法和装置
公开(公告)号：US07713432B2
公开(公告)日：2010-05-11
申请号：US11229319
申请日：2005-09-16
申请人： David Johnson , Russell Westerman
发明人： David Johnson , Russell Westerman
IPC分类号： C03C15/00
CPC分类号： H01J37/321 , H01J37/32623 , H01J37/32935 , H01J37/3299
摘要： The present invention provides a method and an apparatus for improving the etch uniformity across a substrate during a plasma etch process that employs the use of an inductively coupled plasma helical inductor. The plasma apparatus comprising a vacuum chamber, a support member in the vacuum chamber for holding the substrate, an etchant gas supply for providing an etchant gas to the vacuum chamber, an exhaust in fluid communication with the vacuum chamber, an RF power source and a helical inductor disposed around or near a portion of the vacuum chamber. A sensor is provided for measuring a process attribute to generate a signal to a controller that then controls a mechanism that varies the position of the helical inductor so that the uniformity of the plasma etch is improved.
摘要翻译：本发明提供了一种用于在使用电感耦合等离子体螺旋电感器的等离子体蚀刻工艺期间改善衬底上的蚀刻均匀性的方法和装置。等离子体装置包括真空室，用于保持基板的真空室中的支撑构件，用于向真空室提供蚀刻剂气体的蚀刻剂气体供应源，与真空室流体连通的排气，RF电源和设置在真空室的一部分周围或附近的螺旋电感器。提供了用于测量处理属性以产生信号给控制器的传感器，该控制器然后控制改变螺旋电感器位置的机构，从而提高等离子体蚀刻的均匀性。

2. 发明申请

US20080149597A1 Temperature Control Method for Photolithographic Substrate 有权
标题翻译：光刻基板的温度控制方法
公开(公告)号：US20080149597A1
公开(公告)日：2008-06-26
申请号：US11756074
申请日：2007-05-31
申请人： Jason Plumhoff , Larry Ryan , John Nolan , David Johnson , Russell Westerman
发明人： Jason Plumhoff , Larry Ryan , John Nolan , David Johnson , Russell Westerman
IPC分类号： B44C1/22
CPC分类号： H01J37/32623 , G03F1/80 , H01J37/32724 , H01J2237/2001 , H01J2237/334
摘要： The present invention provides a method for processing a photolithographic substrate, comprising the placement of the photolithographic substrate on a support member in a chamber wherein the photolithographic substrate has an initial temperature of about zero degrees Celsius to about fifty degrees Celsius. A heat transfer fluid is introduced into the chamber to cool the photolithographic substrate to a target temperature of less than about zero degrees Celsius to less than about minus forty degrees Celsius. The cooled photolithographic substrate is subjected to a plasma process before the temperature of the cooled photolithographic substrate reaches the initial temperature.
摘要翻译：本发明提供一种用于处理光刻基片的方法，包括将光刻基片放置在腔室中的支撑构件上，其中光刻基片具有约零摄氏度至约五十摄氏度的初始温度。将传热流体引入室中以将光刻基板冷却至小于约零摄氏度至小于零下四十度的目标温度。在冷却的光刻基板的温度达到初始温度之前，对冷却的光刻基板进行等离子体处理。

3. 发明申请

US20080035606A1 Method to Minimize CD Etch Bias 有权
标题翻译：减少CD蚀刻偏差的方法
公开(公告)号：US20080035606A1
公开(公告)日：2008-02-14
申请号：US11834299
申请日：2007-08-06
申请人： Jason Plumhoff , Sunil Srinivasan , David Johnson , Russell Westerman
发明人： Jason Plumhoff , Sunil Srinivasan , David Johnson , Russell Westerman
IPC分类号： G01R31/00
CPC分类号： C23F4/00 , G03F1/54 , G03F1/80
摘要： The present invention provides a method for improving the critical dimension performance during a plasma etching process of a photolithographic substrate having a thin film. A passivation film is deposited onto the photolithographic substrate using a first set of process conditions. The deposited film is etched from the photolithographic substrate using a second set of process conditions. An exposed surface of the photolithographic substrate is etched using a third set of process conditions. During the plasma processing of the photolithographic substrate, the critical dimension performance of the photolithographic substrate is monitored to insure that the target uniformity and feature widths are obtained by adjusting the deposition and etch plasma processing of the photolithographic substrate.
摘要翻译：本发明提供了一种在具有薄膜的光刻基片的等离子体蚀刻工艺中提高临界尺寸性能的方法。使用第一组工艺条件将钝化膜沉积在光刻基板上。使用第二组工艺条件从光刻基板蚀刻沉积的膜。使用第三组工艺条件蚀刻光刻基片的暴露表面。在光刻基板的等离子体处理期间，监测光刻基板的临界尺寸性能，以确保通过调整光刻基板的沉积和蚀刻等离子体处理来获得目标均匀性和特征宽度。

4. 发明申请

US20050263485A1 Method and apparatus for process control in time division multiplexed (TDM) etch processes 有权
标题翻译：用于时分复用（TDM）蚀刻工艺中的过程控制的方法和装置
公开(公告)号：US20050263485A1
公开(公告)日：2005-12-01
申请号：US11155904
申请日：2005-06-20
申请人： David Johnson , Russell Westerman , Mike Teixeira , Shouliang Lai
发明人： David Johnson , Russell Westerman , Mike Teixeira , Shouliang Lai
IPC分类号： G05D16/20 , H01J37/32 , H01L21/00 , H01L21/3065 , H01L21/302 , G01R31/00
CPC分类号： G05D16/2013 , H01J37/3244 , H01J37/32449 , H01J37/32935 , H01L21/67253 , Y10T137/2544
摘要： The present invention provides a method for controlling pressure in a chamber during a time division multiplexed process. A throttle valve is positioned based on an open-loop pressure control algorithm within at least one step of the time division multiplexed etch process. A pressure response of the step is evaluated and compared to a desired pressure response. The throttle valve is then positioned through a proportional, integral and derivative controller step to step of the time division multiplexed etch process based on the evaluation to the desired pressure response.
摘要翻译：本发明提供一种在时分多路复用过程中控制室内的压力的方法。在时分复用蚀刻工艺的至少一个步骤中，基于开环压力控制算法定位节流阀。评估该步骤的压力响应并将其与期望的压力响应进行比较。然后基于对期望的压力响应的评估，节流阀通过比例积分和微分控制器定位到步进到时分复用蚀刻工艺。

5. 发明申请

US20120238073A1 Method and Apparatus for Plasma Dicing a Semi-conductor Wafer 有权
标题翻译：用于等离子体切割半导体晶片的方法和装置
公开(公告)号：US20120238073A1
公开(公告)日：2012-09-20
申请号：US13448769
申请日：2012-04-17
申请人： Chris Johnson , David Johnson , Russell Westerman
发明人： Chris Johnson , David Johnson , Russell Westerman
IPC分类号： H01L21/78
CPC分类号： H01L21/78 , H01J37/321 , H01J37/32155 , H01J37/32422 , H01J37/32623 , H01J37/32642 , H01J37/32651 , H01J37/32724 , H01L21/3065 , H01L21/30655 , H01L21/31116 , H01L21/67011 , H01L21/67069 , H01L21/67739 , H01L21/68 , H01L21/6831 , H01L21/6833 , H01L21/68735 , H01L21/68742 , H01L21/782 , H01L2221/68327 , Y10S414/139
摘要： The present invention provides a method for plasma dicing a substrate. The method comprising providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; placing the substrate onto a support film on a frame to form a work piece work piece; loading the work piece onto the work piece support; providing a cover ring disposed above the work piece; generating a plasma through the plasma source; and etching the work piece through the generated plasma.
摘要翻译：本发明提供了一种等离子体切割基板的方法。该方法包括提供具有壁的处理室; 提供与处理室的壁相邻的等离子体源; 在处理室内提供工件支撑; 将基板放置在框架上的支撑膜上以形成工件工件; 将工件装载到工件支架上; 提供设置在工件上方的盖环; 通过等离子体源产生等离子体; 并通过产生的等离子体蚀刻工件。

6. 发明授权

US08187483B2 Method to minimize CD etch bias 有权
标题翻译：减少CD蚀刻偏差的方法
公开(公告)号：US08187483B2
公开(公告)日：2012-05-29
申请号：US11834299
申请日：2007-08-06
申请人： Jason Plumhoff , Sunil Srinivasan , David Johnson , Russell Westerman
发明人： Jason Plumhoff , Sunil Srinivasan , David Johnson , Russell Westerman
IPC分类号： G01L21/00 , H01L21/00
CPC分类号： C23F4/00 , G03F1/54 , G03F1/80
摘要： The present invention provides a method for improving the critical dimension performance during a plasma etching process of a photolithographic substrate having a thin film. A passivation film is deposited onto the photolithographic substrate using a first set of process conditions. The deposited film is etched from the photolithographic substrate using a second set of process conditions. An exposed surface of the photolithographic substrate is etched using a third set of process conditions. During the plasma processing of the photolithographic substrate, the critical dimension performance of the photolithographic substrate is monitored to insure that the target uniformity and feature widths are obtained by adjusting the deposition and etch plasma processing of the photolithographic substrate.
摘要翻译：本发明提供了一种在具有薄膜的光刻基片的等离子体蚀刻工艺中提高临界尺寸性能的方法。使用第一组工艺条件将钝化膜沉积在光刻基板上。使用第二组工艺条件从光刻基板蚀刻沉积的膜。使用第三组工艺条件蚀刻光刻基片的暴露表面。在光刻基板的等离子体处理期间，监测光刻基板的临界尺寸性能，以确保通过调整光刻基板的沉积和蚀刻等离子体处理来获得目标均匀性和特征宽度。

7. 发明授权

US07115520B2 Method and apparatus for process control in time division multiplexed (TDM) etch process 有权
标题翻译：用于时分复用（TDM）蚀刻工艺中的过程控制的方法和装置
公开(公告)号：US07115520B2
公开(公告)日：2006-10-03
申请号：US10815965
申请日：2004-03-31
申请人： David Johnson , Shouliang Lai , Russell Westerman
发明人： David Johnson , Shouliang Lai , Russell Westerman
IPC分类号： H01L21/461 , H01L21/302 , G05D7/00
CPC分类号： H01J37/3244 , H01J37/32449 , H01L21/67253 , Y10T137/2544
摘要： The present invention provides a method for controlling pressure in a vacuum chamber during a time division multiplexed process. A throttle valve is pre-positioned and held for a predetermined period of time. A process gas is introduced into the vacuum chamber during the associated plasma step (deposition or etching) of the silicon wafer. At the end of the predetermined period of time, the process gas continues to flow with the throttle valve being released from the set position. At this point, the throttle valve is regulated through a proportional derivative and integral control for a period that lasts the remaining time of the associated plasma step.
摘要翻译：本发明提供一种在时分复用过程中控制真空室中的压力的方法。节气门预定位并保持预定时间段。在硅晶片的相关等离子体步骤（沉积或蚀刻）期间，将工艺气体引入真空室。在预定时间段结束时，处理气体继续流动，节流阀从设定位置释放。此时，节流阀通过比例导数和积分控制进行调节，持续相关等离子体步骤的剩余时间。

8. 发明授权

US07008877B2 Etching of chromium layers on photomasks utilizing high density plasma and low frequency RF bias 有权
标题翻译：使用高密度等离子体和低频RF偏压在光掩模上蚀刻铬层
公开(公告)号：US07008877B2
公开(公告)日：2006-03-07
申请号：US10839809
申请日：2004-05-03
申请人： Christopher Constantine , Jason Plumhoff , Russell Westerman , David J. Johnson
发明人： Christopher Constantine , Jason Plumhoff , Russell Westerman , David J. Johnson
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： G03F1/80 , C23F4/00 , H01J37/321
摘要： The present invention provides a method and an apparatus for etching a photolithographic substrate. The photolithographic substrate is placed on a support member in a vacuum chamber. A processing gas for etching a material from the photolithographic substrate is introduced into the vacuum chamber, and a plasma is generated. An RF bias is supplied to the support member in the vacuum chamber through an RF bias frequency generator at or below the ion transit frequency. Exposed material is etched from the photolithographic substrate with improved CD Etch Linearity and CD Etch Bias since the low frequency bias allows the developed charge on the photolithographic substrate, generated by the plasma, to dissipate.
摘要翻译：本发明提供一种蚀刻光刻基片的方法和装置。将光刻基板放置在真空室中的支撑构件上。将用于从光刻基板蚀刻材料的处理气体引入真空室中，并产生等离子体。通过在离子转移频率处或低于离子转移频率的RF偏置频率发生器将RF偏压提供给真空室中的支撑构件。通过改进的CD蚀刻线性和CD蚀刻偏压从光刻基板蚀刻暴露的材料，因为低频偏压允许由等离子体产生的光刻基板上的显影电荷消散。

9. 发明申请

US20050287815A1 Method and apparatus for reducing aspect ratio dependent etching in time division multiplexed etch processes 有权
标题翻译：用于在时分多路复用蚀刻工艺中减少高宽比依赖蚀刻的方法和装置
公开(公告)号：US20050287815A1
公开(公告)日：2005-12-29
申请号：US11159415
申请日：2005-06-23
申请人： Shouliang Lai , David Johnson , Russell Westerman
发明人： Shouliang Lai , David Johnson , Russell Westerman
IPC分类号： C23F1/00 , G01L21/30 , G01R31/00 , H01L21/302 , H01L21/306 , H01L21/3065 , H01L21/461 , H01L21/66
CPC分类号： H01L21/67253 , H01L21/30655 , H01L22/20
摘要： The present invention provides a method and an apparatus for reducing aspect ratio dependent etching that is observed when plasma etching deep trenches in a semiconductor substrate through an alternating deposition/etch process. A plurality of different sized features on the substrate are monitored in real time during the alternating deposition/etch process. Then, based on the information received from the monitor, at least one process parameter is adjusted in the alternating deposition/etch process to achieve equivalent etch depths of at least two different sized features on the substrate.
摘要翻译：本发明提供了一种用于减小当通过交替沉积/蚀刻工艺等离子体蚀刻半导体衬底中的深沟槽时观察到的纵横比相关蚀刻的方法和装置。在交替的沉积/蚀刻工艺期间实时地监测衬底上的多个不同尺寸的特征。然后，基于从监视器接收的信息，在交替沉积/蚀刻工艺中调整至少一个工艺参数，以实现衬底上至少两个不同尺寸特征的等效蚀刻深度。

10. 发明申请

US20050112891A1 Notch-free etching of high aspect SOI structures using a time division multiplex process and RF bias modulation 审中-公开
标题翻译：使用时分多路复用处理和RF偏置调制的高方位SOI结构的无槽蚀刻
公开(公告)号：US20050112891A1
公开(公告)日：2005-05-26
申请号：US10968823
申请日：2004-10-18
申请人： David Johnson , Russell Westerman , Sunil Srinivasan
发明人： David Johnson , Russell Westerman , Sunil Srinivasan
IPC分类号： H01L21/3065 , H01L21/762 , H01L21/302 , H01L21/461
CPC分类号： H01L21/30655 , H01L21/76283
摘要： The present invention provides a method and an apparatus for reducing, or eliminating, the notching observed in the creation of SOI structures on a substrate when plasma etching through an alternating deposition/etch process by modulating the RF bias that is applied to the cathode. Modulation of the bias voltage to the cathode is accomplished either discretely, between at least two frequencies, or continuously during the alternating deposition/etch process.
摘要翻译：本发明提供了一种用于减少或消除在通过调制施加到阴极的RF偏压的交替沉积/蚀刻工艺的等离子体蚀刻时在衬底上产生SOI结构时观察到的凹口的方法和装置。对阴极的偏置电压的调制在离散地，至少两个频率之间或在交替沉积/蚀刻过程期间连续地实现。

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