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1. 发明申请

US20130005083A9 FOUR MOSFET FULL BRIDGE MODULE 有权
公开(公告)号：US20130005083A9
公开(公告)日：2013-01-03
申请号：US13397285
申请日：2012-02-15
申请人： Yong Liu , Qiuxiao Qian , JiangYuan Zhang , Mike Speed , Jung Tae Lee , Luke Huiyong Chung
发明人： Yong Liu , Qiuxiao Qian , JiangYuan Zhang , Mike Speed , Jung Tae Lee , Luke Huiyong Chung
IPC分类号： H01L21/56
CPC分类号： H01L23/49575 , H01L23/3107 , H01L23/49524 , H01L23/49551 , H01L23/49562 , H01L24/36 , H01L24/40 , H01L24/41 , H01L24/48 , H01L2224/40245 , H01L2224/45014 , H01L2224/48247 , H01L2224/4847 , H01L2224/48472 , H01L2224/73219 , H01L2224/73221 , H01L2924/00014 , H01L2924/01006 , H01L2924/01015 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207 , H01L2224/37099
摘要： A molded, leadless packaged semiconductor multichip module includes 100 has four mosfets 10, 12, 14, 16 for a full bridge circuit. The mosfets may include two N-channel and two P-channel devices or four mosfets of the same type, but four N-channel are preferred. In module 100 there are two leadframes 30, 40 for assembling the mosfets. In particular, the two N-channel and two P-channel devices are disposed between two leadframes and encapsulated in an electrically insulating molding compound 84. The resulting package has four upper heat sinks 44.1-44.4 that are exposed in the molding compound 84 for transferring heat from the mosfets to the ambient environment. No wire bonds are required. This can significantly reduce the on resistance, RDSON. The top or source-drain lead frame 30 may be soldered to the sources and gates of the bridge mosfets.

2. 发明授权

US08138585B2 Four mosfet full bridge module 有权
标题翻译：四个mosfet全桥模块
公开(公告)号：US08138585B2
公开(公告)日：2012-03-20
申请号：US12128130
申请日：2008-05-28
申请人： Yong Liu , Qiuxiao Qian , JiangYuan Zhang , Mike Speed , JungTae Lee , Huiyong Luke Chung
发明人： Yong Liu , Qiuxiao Qian , JiangYuan Zhang , Mike Speed , JungTae Lee , Huiyong Luke Chung
IPC分类号： H01L23/495
CPC分类号： H01L23/49575 , H01L23/3107 , H01L23/49524 , H01L23/49551 , H01L23/49562 , H01L24/36 , H01L24/40 , H01L24/41 , H01L24/48 , H01L2224/40245 , H01L2224/45014 , H01L2224/48247 , H01L2224/4847 , H01L2224/48472 , H01L2224/73219 , H01L2224/73221 , H01L2924/00014 , H01L2924/01006 , H01L2924/01015 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207 , H01L2224/37099
摘要： A molded, leadless packaged semiconductor multichip module includes 100 has four mosfets 10, 12, 14, 16 for a full bridge circuit. The mosfets may include two N-channel and two P-channel devices or four mosfets of the same type, but four N-channel are preferred. In module 100 there are two leadframes 30, 40 for assembling the mosfets. In particular, the two N-channel and two P-channel devices are disposed between two leadframes and encapsulated in an electrically insulating molding compound 84. The resulting package has four upper heat sinks 44.1-44.4 that are exposed in the molding compound 84 for transferring heat from the mosfets to the ambient environment. No wire bonds are required. This can significantly reduce the on resistance, RDSON. The top or source-drain lead frame 30 may be soldered to the sources and gates of the bridge mosfets.
摘要翻译：包括100个的模制的无引线封装半导体多芯片模块具有用于全桥电路的四个mosfet 10,12,14,16。 MOSFET可以包括两个N沟道和两个P沟道器件或四个相同类型的MOS器件，但是优选四个N沟道。在模块100中，存在用于组装mosfet的两个引线框30,40。特别地，两个N沟道和两个P沟道器件设置在两个引线框之间并封装在电绝缘的模制化合物84中。所得到的封装具有四个上部散热器44.1-44.4，其暴露在模制化合物84中用于转移从mosfet到周围环境的热量。不需要引线键。这可以显着降低RDSON的导通电阻。顶部或源极 - 漏极引线框架30可以焊接到桥式MOSFET的源极和栅极。

3. 发明授权

US07829988B2 Stacking quad pre-molded component packages, systems using the same, and methods of making the same 有权
标题翻译：堆叠四预成型组件封装，使用其的系统及其制造方法
公开(公告)号：US07829988B2
公开(公告)日：2010-11-09
申请号：US12235227
申请日：2008-09-22
申请人： Yong Liu , Howard Allen , Qiuxiao Qian
发明人： Yong Liu , Howard Allen , Qiuxiao Qian
IPC分类号： H01L21/50
CPC分类号： H01L23/4951 , H01L23/3107 , H01L23/49572 , H01L23/49861 , H01L25/105 , H01L2224/0554 , H01L2224/05573 , H01L2224/13025 , H01L2224/16 , H01L2225/1029 , H01L2225/1041 , H01L2924/00014 , H01L2924/13091 , H01L2924/19105 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： Pre-molded component packages that may be as thin as a leadframe for a semiconductor die, systems using the same, and methods of making the same are disclosed. The leads of an exemplary package are exposed at both surfaces at the leadframe. The packages may be stacked upon one another and electrically coupled at the exposed portions of their leads.
摘要翻译：公开了可以与用于半导体管芯的引线框一样薄的预成型部件封装，使用其的系统及其制造方法。示例性包装的引线在引线框架的两个表面处露出。封装可以彼此堆叠并且在引线的暴露部分处电耦合。

4. 发明申请

US20090194887A1 EMBEDDED DIE PACKAGE ON PACKAGE (POP) WITH PRE-MOLDED LEADFRAME 有权
标题翻译：包装（POP）上嵌入的DIE包装与预先设计的铅笔
公开(公告)号：US20090194887A1
公开(公告)日：2009-08-06
申请号：US12026742
申请日：2008-02-06
申请人： Yong Liu , Qiuxiao Qian
发明人： Yong Liu , Qiuxiao Qian
IPC分类号： H01L23/00 , H01L21/50
CPC分类号： H01L23/49861 , H01L25/105 , H01L2225/1029 , H01L2225/1058 , H01L2924/0002 , H01L2924/00
摘要： A multiple-chip package has top and bottom pre-molded leadframes formed prior to the flip-chip attachment of semiconductor die to the leadframes. After die attachment, underfill is used to encase all but one surface of the die, and the top and bottom leadframes are joined together by solder bump balls with the exposed surfaces of the semiconductor dice proximate to each other.
摘要翻译：多芯片封装在将半导体管芯倒装芯片连接到引线框架之前形成顶部和底部预成型引线框架。在芯片附接之后，使用底部填充物封装模具的除了一个表面之外的所有其它表面，并且顶部和底部引线框架通过焊料凸块球连接在一起，其中半导体芯片的暴露表面彼此靠近。

5. 发明授权

US08421204B2 Embedded semiconductor power modules and packages 失效
标题翻译：嵌入式半导体电源模块和封装
公开(公告)号：US08421204B2
公开(公告)日：2013-04-16
申请号：US13110865
申请日：2011-05-18
申请人： Yong Liu , Qiuxiao Qian , Yumin Liu
发明人： Yong Liu , Qiuxiao Qian , Yumin Liu
IPC分类号： H01L23/52 , H01L21/00
CPC分类号： H01L21/56 , H01L23/3107 , H01L23/5389 , H01L24/19 , H01L24/96 , H01L25/16 , H01L25/162 , H01L2224/04105 , H01L2224/32245 , H01L2224/73267 , H01L2224/92244 , H01L2924/12042 , H01L2924/13055 , H01L2924/13091 , H05K1/185 , H01L2924/00
摘要： Disclosed are semiconductor die packages constructed from modules of embedded semiconductor dice and electrical components. In one embodiment, a semiconductor die package comprises a first module and a second module attached to the first module. One or more semiconductor dice are embedded in the first module, and one or more electrical components, such as surface-mounted components, are embedded in the second module. The first module may be formed by a lamination process, and the second module may be formed by a lamination process or a molding process. Patterned metal layers and vias provide electrical interconnections to the package and among the die and components of the package. The second module may be attached to the first module by coupling interconnect lands of separately manufactured modules to one another, or may be directly attached by lamination or molding.
摘要翻译：公开了由嵌入式半导体芯片和电气部件的模块构成的半导体管芯封装。在一个实施例中，半导体管芯封装包括第一模块和连接到第一模块的第二模块。一个或多个半导体裸片嵌入在第一模块中，并且一个或多个电组件，例如表面安装组件，嵌入在第二模块中。第一模块可以通过层压工艺形成，并且第二模块可以通过层压工艺或模制工艺形成。图案化的金属层和通孔提供对封装以及芯片和封装的部件之间的电互连。第二模块可以通过将单独制造的模块的互连焊盘彼此连接，或者可以通过层压或模制来直接附接到第一模块。

6. 发明授权

US08367481B2 Four MOSFET full bridge module 有权
标题翻译：四个MOSFET全桥模块
公开(公告)号：US08367481B2
公开(公告)日：2013-02-05
申请号：US13397285
申请日：2012-02-15
申请人： Yong Liu , Qiuxiao Qian , JiangYuan Zhang , Mike Speed , JungTae Lee , Luke Huiyong Chung
发明人： Yong Liu , Qiuxiao Qian , JiangYuan Zhang , Mike Speed , JungTae Lee , Luke Huiyong Chung
IPC分类号： H01L21/56
CPC分类号： H01L23/49575 , H01L23/3107 , H01L23/49524 , H01L23/49551 , H01L23/49562 , H01L24/36 , H01L24/40 , H01L24/41 , H01L24/48 , H01L2224/40245 , H01L2224/45014 , H01L2224/48247 , H01L2224/4847 , H01L2224/48472 , H01L2224/73219 , H01L2224/73221 , H01L2924/00014 , H01L2924/01006 , H01L2924/01015 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207 , H01L2224/37099
摘要： A molded, leadless packaged semiconductor multichip module includes 100 has four mosfets 10, 12, 14, 16 for a full bridge circuit. The mosfets may include two N-channel and two P-channel devices or four mosfets of the same type, but four N-channel are preferred. In module 100 there are two leadframes 30, 40 for assembling the mosfets. In particular, the two N-channel and two P-channel devices are disposed between two leadframes and encapsulated in an electrically insulating molding compound 84. The resulting package has four upper heat sinks 44.1-44.4 that are exposed in the molding compound 84 for transferring heat from the mosfets to the ambient environment. No wire bonds are required. This can significantly reduce the on resistance, RDSON. The top or source-drain lead frame 30 may be soldered to the sources and gates of the bridge mosfets.
摘要翻译：包括100个的模制的无引线封装半导体多芯片模块具有用于全桥电路的四个mosfet 10,12,14,16。 MOSFET可以包括两个N沟道和两个P沟道器件或四个相同类型的MOS器件，但是优选四个N沟道。在模块100中，存在用于组装mosfet的两个引线框30,40。特别地，两个N沟道和两个P沟道器件设置在两个引线框之间并封装在电绝缘的模制化合物84中。所得到的封装具有四个上部散热器44.1-44.4，其暴露在模制化合物84中用于转移从mosfet到周围环境的热量。不需要引线键。这可以显着降低RDSON的导通电阻。顶部或源极 - 漏极引线框架30可以焊接到桥式MOSFET的源极和栅极。

7. 发明申请

US20120094436A1 EMBEDDED DIE PACKAGE ON PACKAGE (POP) WITH PRE-MOLDED LEADFRAME 有权
标题翻译：包装（POP）上嵌入的DIE包装与预先设计的铅笔
公开(公告)号：US20120094436A1
公开(公告)日：2012-04-19
申请号：US13276372
申请日：2011-10-19
申请人： Yong Liu , Qiuxiao Qian
发明人： Yong Liu , Qiuxiao Qian
IPC分类号： H01L21/60
CPC分类号： H01L23/49861 , H01L25/105 , H01L2225/1029 , H01L2225/1058 , H01L2924/0002 , H01L2924/00
摘要： A multiple-chip package has top and bottom pre-molded leadframes formed prior to the flip-chip attachment of semiconductor die to the leadframes. After die attachment, underfill is used to encase all but one surface of the die, and the top and bottom leadframes are joined together by solder bump balls with the exposed surfaces of the semiconductor dice proximate to each other.
摘要翻译：多芯片封装在将半导体管芯倒装芯片连接到引线框架之前形成顶部和底部预成型引线框架。在芯片附接之后，使用底部填充物封装模具的除了一个表面之外的所有其它表面，并且顶部和底部引线框架通过焊料凸块球连接在一起，其中半导体芯片的暴露表面彼此靠近。

8. 发明申请

US20090294936A1 FOUR MOSFET FULL BRIDGE MODULE 有权
标题翻译：四MOSFET全桥模块
公开(公告)号：US20090294936A1
公开(公告)日：2009-12-03
申请号：US12128130
申请日：2008-05-28
申请人： Yong Liu , Qiuxiao Qian , JiangYuan Zhang , Mike Speed , JungTae Lee , Huiyong Luke Chung
发明人： Yong Liu , Qiuxiao Qian , JiangYuan Zhang , Mike Speed , JungTae Lee , Huiyong Luke Chung
IPC分类号： H01L23/495 , H01L21/56
CPC分类号： H01L23/49575 , H01L23/3107 , H01L23/49524 , H01L23/49551 , H01L23/49562 , H01L24/36 , H01L24/40 , H01L24/41 , H01L24/48 , H01L2224/40245 , H01L2224/45014 , H01L2224/48247 , H01L2224/4847 , H01L2224/48472 , H01L2224/73219 , H01L2224/73221 , H01L2924/00014 , H01L2924/01006 , H01L2924/01015 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207 , H01L2224/37099
摘要： A molded, leadless packaged semiconductor multichip module includes 100 has four mosfets 10, 12, 14, 16 for a full bridge circuit. The mosfets may include two N-channel and two P-channel devices or four mosfets of the same type, but four N-channel are preferred. In module 100 there are two leadframes 30, 40 for assembling the mosfets. In particular, the two N-channel and two P-channel devices are disposed between two leadframes and encapsulated in an electrically insulating molding compound 84. The resulting package has four upper heat sinks 44.1-44.4 that are exposed in the molding compound 84 for transferring heat from the mosfets to the ambient environment. No wire bonds are required. This can significantly reduce the on resistance, RDSON. The top or source-drain lead frame 30 may be soldered to the sources and gates of the bridge mosfets.
摘要翻译：包括100个的模制的无引线封装半导体多芯片模块具有用于全桥电路的四个mosfet 10,12,14,16。 MOSFET可以包括两个N沟道和两个P沟道器件或四个相同类型的MOS器件，但是优选四个N沟道。在模块100中，存在用于组装mosfet的两个引线框30,40。特别地，两个N沟道和两个P沟道器件设置在两个引线框之间并封装在电绝缘的模制化合物84中。所得到的封装具有四个上部散热器44.1-44.4，其暴露在模制化合物84中用于转移从mosfet到周围环境的热量。不需要引线键。这可以显着降低RDSON的导通电阻。顶部或源极 - 漏极引线框架30可以焊接到桥式MOSFET的源极和栅极。

9. 发明申请

US20090189266A1 SEMICONDUCTOR PACKAGE WITH STACKED DICE FOR A BUCK CONVERTER 有权
标题翻译：半导体封装，带有一个转矩转换器
公开(公告)号：US20090189266A1
公开(公告)日：2009-07-30
申请号：US12020855
申请日：2008-01-28
申请人： Yong Liu , William Newberry , Margie T. Rios , Qiuxiao Qian
发明人： Yong Liu , William Newberry , Margie T. Rios , Qiuxiao Qian
IPC分类号： H01L23/02 , H01L21/02
CPC分类号： H01L23/49575 , H01L23/3107 , H01L23/49562 , H01L24/40 , H01L24/41 , H01L24/48 , H01L24/49 , H01L24/97 , H01L2224/40247 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/49171 , H01L2924/00014 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01082 , H01L2924/07802 , H01L2924/181 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2224/37099
摘要： Disclosed in this specification is a buck converter package with stacked dice and a process for forming a buck converter. The package includes a die attach pad with a low side die mounted on one surface and a high side die mounted on the opposing surface. The die attach pad is conductive, such that the drain of the low side die is connected to the source of the high side die through the pad. A controller die controls the gates of the high and low side dies. A plurality of leads extends outside of the package to permit electrical connections to the inside of the package. The high side drain is exposed to one of the surfaces of the package.
摘要翻译：在本说明书中公开了具有堆叠骰子的降压转换器封装和用于形成降压转换器的工艺。该封装包括一个安装在一个表面上的具有一个低边裸片的芯片安装板和一个安装在相对表面上的高边模具。芯片焊盘是导电的，使得低边裸片的漏极通过焊盘连接到高侧裸片的源极。控制器模具控制高低侧模具的门。多个引线延伸到封装的外部，以允许电连接到封装的内部。高侧漏极暴露于封装的一个表面。

10. 发明申请

US20120326170A1 WAFER LEVEL MOLDED OPTO-COUPLERS 审中-公开
标题翻译： WAFER LEVEL模制OPTO-COUPLERS
公开(公告)号：US20120326170A1
公开(公告)日：2012-12-27
申请号：US13166697
申请日：2011-06-22
申请人： Yong Liu , Qiuxiao Qian
发明人： Yong Liu , Qiuxiao Qian
IPC分类号： H01L33/48 , H01L33/62
CPC分类号： H01L25/167 , H01L21/568 , H01L24/24 , H01L24/25 , H01L24/82 , H01L2224/04105 , H01L2224/12105 , H01L2224/2518 , H01L2924/12041 , H01L2924/12042 , H01L2924/12043 , H01L2924/00
摘要： Optocoupler packages and methods of making the same. An exemplary package comprises a substrate having a first surface, a second surface opposite the first surface, and a body of electrically insulating material disposed between the first and second surfaces; a first optoelectronic device embedded in the body of electrically insulating material of the substrate and disposed between the substrate's first and second surfaces, the first optoelectronic device having a first conductive region and a second conductive region; a second optoelectronic device embedded in the body of electrically insulating material of the substrate and disposed between the substrate's first and second surfaces and optically coupled to the first optoelectronic device, the second optoelectronic device having a first conductive region and a second conductive region; and a plurality of electrical traces disposed on one or both surfaces of the substrate and electrically coupled to the conductive regions of the optoelectronic devices.
摘要翻译：光耦合器封装及其制作方法。示例性包装包括具有第一表面，与第一表面相对的第二表面的基底和设置在第一和第二表面之间的电绝缘材料体; 第一光电子器件，其嵌入在所述衬底的电绝缘材料的主体中并且设置在所述衬底的第一和第二表面之间，所述第一光电器件具有第一导电区域和第二导电区域; 第二光电子器件，其嵌入在所述衬底的电绝缘材料的主体中并且设置在所述衬底的第一和第二表面之间并且光耦合到所述第一光电子器件，所述第二光电子器件具有第一导电区域和第二导电区域; 以及设置在所述基板的一个或两个表面上并电耦合到所述光电子器件的导电区域的多个电迹线。

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