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1. 发明授权

US5827970A Non-destructive method of determining substrate tilt within a packaged semiconductor component 失效
标题翻译：确定封装半导体部件内的衬底倾斜的非破坏性方法
公开(公告)号：US5827970A
公开(公告)日：1998-10-27
申请号：US724285
申请日：1996-09-16
申请人： Isaac T. Poku , Rama P. Cherkur , Yushi Matsuda
发明人： Isaac T. Poku , Rama P. Cherkur , Yushi Matsuda
IPC分类号： G01C9/00 , G01C9/06 , G01N29/07 , G01N29/10
CPC分类号： G01N29/07 , G01N2291/02854 , G01N2291/044 , G01N2291/105 , G01N2291/2698
摘要： A non-destructive method of determining substrate tilt within a packaged component includes providing the packaged component (10) with a component surface (32), providing a substrate (22) in the packaged component (10) wherein the substrate (22) has a substrate surface (33), using an acoustic wave (50) to measure a distance (34) between the component surface (32) and a region on the substrate surface (33), using another acoustic wave (53) to measure another distance (35) between the component surface (32) and a different region on the substrate surface (33), and comparing the distances (34, 35) to a threshold value.
摘要翻译：确定封装部件内的衬底倾斜度的非破坏性方法包括向封装部件（10）提供部件表面（32），在封装部件（10）中提供衬底（22），其中衬底（22）具有使用声波（50）来测量元件表面（32）与衬底表面（33）上的区域之间的距离（34）的衬底表面（33），使用另一声波（53）测量另一距离（ 35）和所述基板表面（33）上的不同区域之间，并且将所述距离（34,35）与阈值进行比较。

2. 发明授权

US5424576A Semiconductor device having x-shaped die support member and method for making the same 失效
标题翻译：具有x形管芯支撑部件的半导体器件及其制造方法
公开(公告)号：US5424576A
公开(公告)日：1995-06-13
申请号：US133947
申请日：1993-10-12
申请人： Frank Djennas , Isaac T. Poku , Robert Yarosh
发明人： Frank Djennas , Isaac T. Poku , Robert Yarosh
IPC分类号： H01L23/495 , H01L23/48
CPC分类号： H01L24/32 , H01L23/49503 , H01L2224/05553 , H01L2224/29007 , H01L2224/32014 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L24/48 , H01L24/73 , H01L2924/00014 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01082 , H01L2924/14 , H01L2924/181 , Y10T29/49121
摘要： A semiconductor device (10) includes a lead frame (12) having tie bars (16). In one form of the invention, the tie bars are used to support a semiconductor die (20) to alleviate package cracking problems caused by stress and to provide a universal lead frame which is suitable for use with many different die sizes. In another embodiment, a semiconductor device (45) includes a lead frame (40) having a mini-flag (42) to accomplish these same objectives.
摘要翻译：半导体器件（10）包括具有连接条（16）的引线框架（12）。在本发明的一种形式中，连接杆用于支撑半导体管芯（20）以减轻由应力引起的封装开裂问题，并提供适用于许多不同管芯尺寸的通用引线框架。在另一个实施例中，半导体器件（45）包括具有微型标志（42）的引线框架（40），以实现这些相同的目的。

3. 发明授权

US5756885A Method for determining the cleanliness of a surface 失效
标题翻译：确定表面清洁度的方法
公开(公告)号：US5756885A
公开(公告)日：1998-05-26
申请号：US628048
申请日：1996-04-04
申请人： Isaac T. Poku , Rama Cherkur
发明人： Isaac T. Poku , Rama Cherkur
IPC分类号： G01N13/02
CPC分类号： G01N13/02 , G01N2013/0241
摘要： A method for determining the cleanliness of a surface of a substrate involves using a visual pattern (17, 29). The visual pattern is either provided in the optical portion of a visual system or is formed on the surface of the substrate to be analyzed. A liquid droplet (26, 27) is dispensed onto the substrate surface, and the extent of the spread area of the droplet is compared to the visual pattern. If the area of the droplet is greater than or equal to a tolerance as signified by the pattern markings, then the surface of the substrate is determined to be sufficiently clean. In relying upon a simple visual comparison of the area of the surface covered by the droplet with an empirically determined visual pattern, a method for analyzing surface cleanliness is consistent between operators and surfaces, is easy to set up and operate, and improves manufacturing throughput.
摘要翻译：用于确定基材表面的清洁度的方法包括使用视觉图案（17,29）。视觉图案被提供在视觉系统的光学部分中，或者形成在待分析的基板的表面上。将液滴（26,27）分配到基板表面上，并将液滴的扩展区域的程度与视觉图案进行比较。如果液滴的面积大于或等于由图案标记表示的公差，则确定基底的表面足够清洁。在凭借经验确定的视觉图案来依靠对液滴覆盖的表面的简单视觉比较，分析表面清洁度的方法在操作者和表面之间是一致的，易于建立和操作，并且提高了生产量。 \！

4. 发明授权

US5327008A Semiconductor device having universal low-stress die support and method for making the same 失效
标题翻译：具有通用低应力模具支架的半导体器件及其制造方法
公开(公告)号：US5327008A
公开(公告)日：1994-07-05
申请号：US35422
申请日：1993-03-22
申请人： Frank Djennas , Isaac T. Poku , Robert Yarosh
发明人： Frank Djennas , Isaac T. Poku , Robert Yarosh
IPC分类号： H01L23/495 , H01L23/48
CPC分类号： H01L24/32 , H01L23/49503 , H01L2224/05553 , H01L2224/29007 , H01L2224/32014 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L24/48 , H01L24/73 , H01L2924/00014 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01082 , H01L2924/14 , H01L2924/181 , Y10T29/49121
摘要： A semiconductor device (10) includes a lead frame (12) having tie bars (16). In one form of the invention, the tie bars are used to support a semiconductor die (20) to alleviate package cracking problems caused by stress and to provide a universal lead frame which is suitable for use with many different die sizes. In another embodiment, a semiconductor device (45) includes a lead frame (40) having a mini-flag (42) to accomplish these same objectives.
摘要翻译：半导体器件（10）包括具有连接条（16）的引线框架（12）。在本发明的一种形式中，连接杆用于支撑半导体管芯（20）以减轻由应力引起的封装开裂问题，并提供适用于许多不同管芯尺寸的通用引线框架。在另一个实施例中，半导体器件（45）包括具有微型标志（42）的引线框架（40），以实现这些相同的目的。

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