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1. 发明授权

US08266340B2 DMA controller 失效
标题翻译： DMA控制器
公开(公告)号：US08266340B2
公开(公告)日：2012-09-11
申请号：US13437297
申请日：2012-04-02
申请人： Yasushi Nagai , Hiroshi Nakagoe , Shigeki Taira
发明人： Yasushi Nagai , Hiroshi Nakagoe , Shigeki Taira
IPC分类号： G06F13/28 , G06F13/00
CPC分类号： G06F13/28 , Y02D10/14
摘要： The DMA controller includes a peripheral device read unit to read states of peripheral devices, a state comparator, a transfer unit, a register, and a peripheral device write unit to write data in the peripheral devices according to the contents in the register when the DMA transfer is executed, an interrupt select unit selects one of plural interrupt signals to determine whether the peripheral device read unit, the state comparator and the transfer unit are at a timing to execute operations. Based on these operations the state comparator determines whether to start the DMA transfer, and the transfer unit executes data transfer between the peripheral devices.
摘要翻译： DMA控制器包括外围设备读取单元，用于读取外围设备的状态，状态比较器，传送单元，寄存器和外围设备写入单元，以根据DMA中的内容在外围设备中写入数据执行转移，中断选择单元选择多个中断信号之一来确定外围设备读取单元，状态比较器和传送单元是否处于执行操作的定时。基于这些操作，状态比较器确定是否启动DMA传输，并且传送单元执行外围设备之间的数据传输。

2. 发明申请

US20120215908A1 METHOD AND SYSTEM FOR DETECTING IMPROPER OPERATION AND COMPUTER-READABLE NON-TRANSITORY STORAGE MEDIUM 审中-公开
标题翻译：用于检测不正确操作的方法和系统以及可计算机非可用存储介质
公开(公告)号：US20120215908A1
公开(公告)日：2012-08-23
申请号：US13130959
申请日：2011-02-18
申请人： Shinichi Tsunoo , Makoto Kayashima , Hiroshi Nakagoe , Hiromi Isokawa , Norio Suzuki , Tomotada Naito
发明人： Shinichi Tsunoo , Makoto Kayashima , Hiroshi Nakagoe , Hiromi Isokawa , Norio Suzuki , Tomotada Naito
IPC分类号： G06F15/173
CPC分类号： G06F21/629 , G06F21/6209 , G06F2221/2101 , G06F2221/2141 , H04L51/12
摘要： An embodiment of this invention detects an improper operation to a file in a computer of a monitoring target in a computer system including a plurality of computers connected via a network. The monitoring target computer receives a file. The computer receives acquisition source information on the file transmitted from a different computer. The computer refers to information on improper operation requirements to determine whether transmission of the file meets the improper operation requirements or not, based on a combination of the acquisition source of the file indicated by the acquisition source information and a transmission destination of the file and if the improper operation requirements are met, it determines that the transmission of the file is an improper operation.
摘要翻译：本发明的实施例检测对包括通过网络连接的多个计算机的计算机系统中的监视目标的计算机中的文件的不正确操作。监视目标计算机接收文件。计算机接收从不同计算机发送的文件的获取源信息。计算机是指基于由采集源信息指示的文件的获取源与文件的发送目的地的组合来确定文件的传输是否满足不正确的操作要求的信息，如果满足不正确的操作要求，确定文件的传输是不正确的操作。

3. 发明申请

US20110321170A1 FRAUDULENT MANIPULATION DETECTION METHOD AND COMPUTER FOR DETECTING FRAUDULENT MANIPULATION 有权
标题翻译：用于检测欺诈手段的欺诈手段检测方法和计算机
公开(公告)号：US20110321170A1
公开(公告)日：2011-12-29
申请号：US12937952
申请日：2010-06-29
申请人： Nobuaki Onodera , Makoto Kayashima , Shinichi Tsunoo , Hiroshi Nakagoe , Hiromi Isokawa , Norio Suzuki
发明人： Nobuaki Onodera , Makoto Kayashima , Shinichi Tsunoo , Hiroshi Nakagoe , Hiromi Isokawa , Norio Suzuki
IPC分类号： G06F21/00
CPC分类号： G06F21/552 , H04L63/1416
摘要： A client computer detects a user operation for transmitting data to a server or a storage device, determines whether the detected user operation is a fraudulent manipulation, and, if the determination is a positive result, performs security processing which is processing related to security of data to be transmitted. If the data is data within a group to which the user belongs and a destination of the data is a server or a storage device outside the group, the determination is a positive result.
摘要翻译：客户端计算机检测用于将数据发送到服务器或存储装置的用户操作，确定检测到的用户操作是否是欺骗性操作，并且如果确定为肯定结果，则执行与数据安全性有关的处理的安全处理被传送。如果数据是用户所属的组内的数据，并且数据的目的地是组外的服务器或存储设备，则确定是肯定的结果。

4. 发明申请

US20110289589A1 UNAUTHORIZED OPERATION DETECTION SYSTEM AND UNAUTHORIZED OPERATION DETECTION METHOD 有权
标题翻译：未经授权的操作检测系统和未经授权的操作检测方法
公开(公告)号：US20110289589A1
公开(公告)日：2011-11-24
申请号：US12808130
申请日：2010-04-02
申请人： Makoto Kayashima , Shinichi Tsunoo , Hiroshi Nakagoe , Hiromi Isokawa , Norio Suzuki
发明人： Makoto Kayashima , Shinichi Tsunoo , Hiroshi Nakagoe , Hiromi Isokawa , Norio Suzuki
IPC分类号： G06F21/00
CPC分类号： G06F21/556 , G06F21/52 , G06F21/552 , G06F21/606 , G06F2221/0737 , G06F2221/2101 , G06F2221/2119 , H04L63/1416
摘要： The content of operations is identified and an alert is generated to an operation having a high risk of information leakage.An agent monitors, for example, operations performed with respect to a dialogue displayed on a client PC. If a file is selected by an operation performed with respect to the displayed dialogue, the agent assigns an identifier indicating a source for the file to the file. If the file is sent as an attached file, the agent identifies an output destination for the attached file as well as the source for the attached file; and if the output destination for the attached file is an external Web server and the source for the attached file is a mail server, the agent generates an alert by determining that an unauthorized operation has been executed; and then sends the generated alert to a management server.
摘要翻译：识别操作的内容，并且对具有高信息泄漏风险的操作产生警报。代理监视例如关于在客户端PC上显示的对话执行的操作。如果通过对显示的对话执行的操作来选择文件，则代理将指定文件的源的标识符分配给该文件。如果文件作为附件发送，代理将识别所附文件的输出目的地以及所附文件的源; 并且如果附加文件的输出目的地是外部Web服务器，并且所附加文件的源是邮件服务器，则代理通过确定已经执行了未经授权的操作来生成警报; 然后将生成的警报发送到管理服务器。

5. 发明申请

US20090222798A1 Information Processing Apparatus 审中-公开
标题翻译：信息处理装置
公开(公告)号：US20090222798A1
公开(公告)日：2009-09-03
申请号：US12332397
申请日：2008-12-11
申请人： Shinya IGUCHI , Takatoshi Kato , Masaya Umemura , Nobuaki Kohinata , Yasushi Nagai , Hiroshi Nakagoe , Keitaro Okasaki , Hirotaka Moribe , Takeshi Asahi
发明人： Shinya IGUCHI , Takatoshi Kato , Masaya Umemura , Nobuaki Kohinata , Yasushi Nagai , Hiroshi Nakagoe , Keitaro Okasaki , Hirotaka Moribe , Takeshi Asahi
IPC分类号： G06F9/45
CPC分类号： G06F8/52
摘要： A mobile device includes a memory for storing therein a subroutine management table to manage kinds of existing codes out of native code, first code and second code for a plurality of subroutines contained in content, a virtual machine, a precompile circuit for producing second code from first code and a subroutine management circuit for changing over processing in accordance with the kind of existing code for subroutine called up during execution of content. The subroutine management circuit judges kind of existing code with reference to the subroutine management table when the processing is changed over.
摘要翻译：移动设备包括一个存储器，用于在其中存储子程序管理表以管理内容中的现有代码的种类，用于内容中包含的多个子程序的第一代码和第二代码，虚拟机，用于从第第一代码和子程序管理电路，用于根据在执行内容期间调用的子程序的现有代码的种类来改变处理。当处理转换时，子程序管理电路参考子程序管理表来判断现有代码的种类。

6. 发明申请

US20130232424A1 USER OPERATION DETECTION SYSTEM AND USER OPERATION DETECTION METHOD 审中-公开
标题翻译：用户操作检测系统和用户操作检测方法
公开(公告)号：US20130232424A1
公开(公告)日：2013-09-05
申请号：US13582004
申请日：2012-03-02
申请人： Hiroshi Nakagoe , Katsuo Nakashima
发明人： Hiroshi Nakagoe , Katsuo Nakashima
IPC分类号： G06F3/0484
CPC分类号： G06F3/0484 , G06F16/335 , G06F16/9535
摘要： The present invention provides a system for detecting and recording a user operation with respect to a web application. This system extracts from an application screen both a character string input element for the user to input a character string and an execution instruction element for instructing the web application to execute a prescribed operation. This system infers the role of the character string input element and execution instruction element in the web application. This system associates the character string input element with the execution instruction element, and extracts an inputted character string, which is inputted to the character string input element. This system creates user operation record data, which is recorded with a user operation, based on template data and the inputted character string.
摘要翻译：本发明提供了一种用于检测和记录关于web应用的用户操作的系统。该系统从应用程序屏幕中提取用于输入字符串的用户的字符串输入元素和用于指示web应用程序执行规定操作的执行指令元素。该系统在Web应用程序中推断字符串输入元素和执行指令元素的作用。该系统将字符串输入元素与执行指令元素相关联，并且提取输入到字符串输入元素的输入字符串。该系统基于模板数据和输入的字符串创建用户操作记录的用户操作记录数据。

7. 发明申请

US20120331186A1 DMA CONTROLLER 审中-公开
公开(公告)号：US20120331186A1
公开(公告)日：2012-12-27
申请号：US13603456
申请日：2012-09-05
申请人： Yasushi NAGAI , Hiroshi NAKAGOE , Shigeki TAIRA
发明人： Yasushi NAGAI , Hiroshi NAKAGOE , Shigeki TAIRA
IPC分类号： G06F13/28
CPC分类号： G06F13/28 , Y02D10/14
摘要： The DMA controller includes a peripheral device read unit to read states of peripheral devices, a state comparator, a transfer unit, a register, and a peripheral device write unit to write data in the peripheral devices according to the contents in the register when the DMA transfer is executed, an interrupt select unit selects one of plural interrupt signals to determine whether the peripheral device read unit, the state comparator and the transfer unit are at a timing to execute operations. Based on these operations the state comparator determines whether to start the DMA transfer, and the transfer unit executes data transfer between the peripheral devices.

8. 发明授权

US08176221B2 DMA controller 失效
标题翻译： DMA控制器
公开(公告)号：US08176221B2
公开(公告)日：2012-05-08
申请号：US12595381
申请日：2008-03-21
申请人： Yasushi Nagai , Hiroshi Nakagoe , Shigeki Taira
发明人： Yasushi Nagai , Hiroshi Nakagoe , Shigeki Taira
IPC分类号： G06F13/28 , G06F13/00
CPC分类号： G06F13/28 , Y02D10/14
摘要： A DMA controller achieving real-time control of a DMA transfer relating to periodically operated peripheral devices at a low cost and with low power consumption. A typical embodiment of the invention is a DMA controller having: a counter for counting time; a counter comparator comparing a value of the counter and a counter value indicating an expected time of a DMA transfer; a peripheral device read unit reading a register of the peripheral device to acquire a state of a peripheral device by; and a state comparator comparing a value of the register read by the peripheral device read unit and a start condition of the DMA transfer, in which, with being triggered by establishment of a comparison result by the counter comparator, in accordance with a specified order, a processing of updating the counter value indicating the expected time of a DMA transfer to a value indicating a next expected time, a read of the register of the peripheral device by the peripheral device read unit, a comparison by the state comparator, and a DMA transfer on the condition that the comparison result by the state comparator is established are executed.
摘要翻译： DMA控制器以低成本和低功耗实现与周期性操作的外围设备相关的DMA传输的实时控制。本发明的典型实施例是一种DMA控制器，具有：计数时间的计数器; 比较计数器的值和表示DMA传送的预期时间的计数器值的计数器比较器; 外围设备读取单元，读取外围设备的寄存器，以通过以下方式获取外围设备的状态; 以及状态比较器，比较由外围设备读取单元读取的寄存器的值和DMA传输的开始条件，其中，通过由计数器比较器建立比较结果而触发，根据指定的顺序，将指示DMA传输的预期时间的计数器值更新为指示下一个预期时间的值的处理，外围设备读取单元对外围设备的寄存器的读取，状态比较器的比较以及DMA 在状态比较器的比较结果建立的条件下进行转移。

9. 发明授权

US07853733B2 Operational circuit 有权
标题翻译：操作电路
公开(公告)号：US07853733B2
公开(公告)日：2010-12-14
申请号：US11984432
申请日：2007-11-16
申请人： Hiroshi Nakagoe , Yasushi Nagai
发明人： Hiroshi Nakagoe , Yasushi Nagai
IPC分类号： G06F13/28
CPC分类号： H04L1/0052 , H04L1/0057
摘要： An operational circuit for performing an operation of an arbitrary number of input data pieces by using a DMA transfer according to a descriptor control and output results. The arbitrary number of input data pieces are divided into a plurality of pieces to perform an operation processing without performing the operation of the arbitrary number of input data pieces at a time. The operational circuit once stores an intermediate result for each of the divided operations in an external storage device, performs an operation processing read with an intermediate result in the next operation processing, and obtains a final result by repeating these operation processings. The operation is performed at a cyclic unit of processing corresponding to the number of address registers provided in the operational circuit.
摘要翻译：一种操作电路，用于通过使用根据描述符控制和输出结果的DMA传输来执行任意数量的输入数据的操作。任意数量的输入数据被分成多个，以执行一次操作处理，而不一次执行任意数量的输入数据的操作。运算电路一次将分割运算的中间结果存储在外部存储装置中，进行下一个运算处理中的中间结果的运算处理，通过重复这些运算处理，得到最终结果。该操作以对应于在操作电路中提供的地址寄存器的数量的循环处理单元进行。

10. 发明申请

US20080294913A1 DISK ARRAY CONTROLLER, DISK ARRAY CONTROL METHOD AND STORAGE SYSTEM 审中-公开
标题翻译：磁盘阵列控制器，磁盘阵列控制方法和存储系统
公开(公告)号：US20080294913A1
公开(公告)日：2008-11-27
申请号：US12014250
申请日：2008-01-15
申请人： Hiroshi NAKAGOE , Toru Owada , Yasushi Nagai
发明人： Hiroshi NAKAGOE , Toru Owada , Yasushi Nagai
IPC分类号： H04L9/06
CPC分类号： H04L9/0637 , H04L2209/125
摘要： Provided is a disk array controller capable of speeding up the processing by simultaneously execution the encryption/decryption of a non parallel block cipher modes of operation. In a disk array controller for controlling a disk array according to a disk access request from a host system, a plurality of non parallel mode encryption/decryption target data are divided into a plurality of messages unrelated to the encryption/decryption processing, partitioning non parallel mode encryption/decryption target data belonging to the respective messages into a plurality of block data, storing each block data belonging to the respective messages by allocating it each line of Rnd[0] to Rnd[R−1] per message, and encrypting/decrypting block data corresponding to block data corresponding to a cell of the same column of each line among the block data stored in a data buffer simultaneously with the pipeline processing performed by a pipeline encryption/decryption circuit.
摘要翻译：提供了一种能够通过同时执行非并行块加密操作模式的加密/解密来加速处理的盘阵列控制器。在用于根据来自主机系统的磁盘访问请求来控制磁盘阵列的磁盘阵列控制器中，多个非并行模式加密/解密目标数据被分成与加密/解密处理无关的多个消息，分割非并行将属于各个消息的模式加密/解密目标数据转换为多个块数据，通过将每个消息的Rnd [0]到Rnd [R-1]的每一行分配来存储属于各个消息的每个块数据，以及加密/ 在与由流水线加密/解密电路执行的流水线处理同时处理与数据缓冲器中存储的块数据中的与每行相同列的单元相对应的块数据的块数据解密。

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