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    • 3. 发明申请
    • Method and system for sampling a signal
    • 用于采样信号的方法和系统
    • US20060001562A1
    • 2006-01-05
    • US10881576
    • 2004-06-30
    • David GuidrySasikumar Cherubal
    • David GuidrySasikumar Cherubal
    • H03M1/12
    • H03M1/1245
    • According to one embodiment of the invention, a method of sampling a signal is provided. The method includes receiving over a signal path an analog signal generated using a first clock signal by a first device. The method also includes sampling the analog signal using a second clock signal to generate a numeric representation of at least a portion of the analog signal. The frequencies of the first and the second clock signals differ from one another by a known amount. The method also includes communicating over the signal path the numeric representation for receipt by a second device. The signal path experiences loading and at least a majority of the loading of the signal path occurs between the sampler and the second device.
    • 根据本发明的一个实施例,提供了一种采样信号的方法。 该方法包括通过信号路径接收由第一设备使用第一时钟信号产生的模拟信号。 该方法还包括使用第二时钟信号对模拟信号进行采样,以产生模拟信号的至少一部分的数字表示。 第一和第二时钟信号的频率彼此相差已知的量。 该方法还包括通过信号路径通信数字表示,以便由第二设备接收。 信号路径经历负载,信号路径的至少大部分负载发生在采样器和第二设备之间。
    • 6. 发明申请
    • Versatile system for time-independent signal sampling
    • 用于时间无关信号采样的多功能系统
    • US20060061349A1
    • 2006-03-23
    • US10946661
    • 2004-09-22
    • David Guidry
    • David Guidry
    • G01R13/02
    • G01R19/2509G01R31/2834G01R31/316
    • The present invention provides a system (100) that overcomes performance incongruities between a high-speed device (102) and commercial ATE (106). The system of the present invention provides an analog-to-analog sampler (104), having a clock input (118). The analog-to-analog sampler receives a first analog test signal (108) from the high-speed device, and converts it into a second analog test signal (116) at a desired rate, utilizing an analog-to-digital-to-analog conversion function (112) and a decimation function (114). The ATE system houses an analog capture component (120). The analog capture component has a clock input (122), and receives the second analog test signal for conversion into digital format. A series of clock signals (126) are generated from a common frequency reference source (124), to provide the necessary clock signals throughout the system.
    • 本发明提供了一种克服高速设备(102)和商业ATE(106)之间的性能不协调的系统(100)。 本发明的系统提供了具有时钟输入(118)的模拟 - 模拟采样器(104)。 模拟到模拟采样器从高速设备接收第一模拟测试信号(108),并且以期望的速率将其转换成第二模拟测试信号(116),利用模数转换器 模拟转换功能(112)和抽取功能(114)。 ATE系统包含模拟捕捉组件(120)。 模拟捕捉组件具有时钟输入(122),并接收第二模拟测试信号以转换为数字格式。 从公共频率参考源(124)生成一系列时钟信号(126),以在整个系统中提供必要的时钟信号。
    • 8. 发明申请
    • System and method for testing differential signal crossover using undersampling
    • 使用欠采样测试差分信号交叉的系统和方法
    • US20060149492A1
    • 2006-07-06
    • US10979981
    • 2004-11-03
    • David Guidry
    • David Guidry
    • G01R31/00
    • G01R31/31937G11C29/02G11C29/022G11C29/50012G11C29/56G11C29/56012G11C2029/5602
    • System and method for testing differential signal crossover in high-speed electronic equipment. A preferred embodiment comprises a test circuit coupled to a device under test (DUT) and an automatic test equipment (ATE). The test circuit comprises a pair of window comparators coupled to a differential mode signal from the DUT, each window comparator configured to compare one of two signals making up the differential mode signal with a voltage boundary when enabled by an enable signal. The ATE is configured to provide clock signals to the test circuit and the DUT and to process data produced by the test circuit to determine if the differential signal crossover meets timing constraints. The test circuit uses undersampling to enable testing of high frequency signals without requiring an extremely high sampling rate.
    • 高速电子设备差分信号分频测试系统及方法。 优选实施例包括耦合到待测器件(DUT)和自动测试设备(ATE)的测试电路。 测试电路包括耦合到来自DUT的差分模式信号的一对窗口比较器,每个窗口比较器被配置为当由使能信号使能时,将组成差分模式信号的两个信号中的一个与电压边界进行比较。 ATE被配置为向测试电路和DUT提供时钟信号,并处理由测试电路产生的数据,以确定差分信号交叉是否满足时序约束。 测试电路使用欠采样来测试高频信号,而不需要非常高的采样率。