基本信息:
- 专利标题： SELECTIVE GENERATION OF MISS REQUESTS FOR CACHE LINES
- 申请号：PCT/US2021/064797 申请日：2021-12-22
- 公开(公告)号：WO2022146810A1 公开(公告)日：2022-07-07
- 发明人： GHODRAT, Fataneh F. , SOMOGYI, Stephen W. , LIU, Zhenhong
- 申请人： ADVANCED MICRO DEVICES, INC. , SAMSUNG ELECTRONICS CO., LTD.
- 申请人地址： 2485 Augustine Drive; 129, Samsung-ro, Yeongtong-gu
- 专利权人： ADVANCED MICRO DEVICES, INC.,SAMSUNG ELECTRONICS CO., LTD.
- 当前专利权人： ADVANCED MICRO DEVICES, INC.,SAMSUNG ELECTRONICS CO., LTD.
- 当前专利权人地址： 2485 Augustine Drive; 129, Samsung-ro, Yeongtong-gu
- 代理机构： SHEEHAN, Adam D.
- 优先权： US17/134,790 2020-12-28
- 主分类号： G06T1/60
- IPC分类号： G06T1/60 ; G06T1/20
摘要：
A graphics pipeline [200] includes a texture cache [207] having cache lines [300, 305] that are partitioned into a plurality of subsets. The graphics pipeline also includes one or more compute units [121, 122, 123] that selectively generates a miss request for a first subset of the plurality of subsets of a cache line in the texture cache in response to a cache miss for a memory access request to an address associated with the first subset of the cache line. In some embodiments, the cache lines are partitioned into a first sector and a second sector. The compute units generate miss requests for the first sector, and bypass generating miss requests for the second sector, in response to cache misses for memory access requests received during a request cycle being in the first sector.