基本信息:
- 专利标题： PROCESS FOR PREPARING A CHANNEL REGION OF A THIN-FILM TRANSISTOR
- 申请号：PCT/US2020/065670 申请日：2020-12-17
- 公开(公告)号：WO2021127218A1 公开(公告)日：2021-06-24
- 发明人： PURAYATH, Vinod , ZHOU, Jie , CHIEN, Wu-Yi Henry , HARARI, Eli
- 申请人： SUNRISE MEMORY CORPORATION
- 申请人地址： 46831 Lakeview Blvd.
- 专利权人： SUNRISE MEMORY CORPORATION
- 当前专利权人： SUNRISE MEMORY CORPORATION
- 当前专利权人地址： 46831 Lakeview Blvd.
- 代理机构： KWOK, Edward C. et al.
- 优先权： US62/950,390 2019-12-19
- 主分类号： H01L21/76
- IPC分类号： H01L21/76 ; H01L27/115 ; H01L21/3065 ; H01L27/1052 ; H01L29/6675 ; H01L29/78642 ; H01L29/78663 ; H01L29/78672
摘要：
A process includes (a) providing a semiconductor substrate having a planar surface; (b) forming a plurality of thin-film layers above the planar surface of the semiconductor substrate, one on top of another, including among the thin-film layers first and second isolation layer wherein a significantly greater concentration of a first dopant specie is provided in the first isolation layer than in the second isolation laye (c) etching along a direction substantially orthogonal to the planar surface through the thin-films to create a trench having sidewalls that expose the thin-film layers; (d) depositing conformally a semiconductor material on the sidewalls of the trench; (e) annealing the first isolation layer at a predetermined temperature and a predetermined duration such that the first isolation layer act as a source of the first dopant specie which dopes a portion of the semiconductor material adjacent the first isolation layer; and (f) selectively etching the semiconductor material.
IPC结构图谱:
| H | 电学 |
| --H01 | 基本电气元件 |
| ----H01L | 半导体器件；其他类目未包含的电固体器件 |
| ------H01L21/00 | 专门适用于制造或处理半导体或固体器件或其部件的方法或设备 |
| --------H01L21/67 | .专门适用于在制造或处理过程中处理半导体或电固体器件的装置；专门适合于在半导体或电固体器件或部件的制造或处理过程中处理晶片的装置 |
| ----------H01L21/71 | ..限定在组H01L21/70中的器件的特殊部件的制造 |
| ------------H01L21/76 | ...组件间隔离区的制作 |