基本信息:
- 专利标题： TWO-LAYER CODE WITH LOW PARITY COST FOR MEMORY SUB-SYSTEMS
- 申请号：PCT/US2020/037297 申请日：2020-06-11
- 公开(公告)号：WO2020257057A1 公开(公告)日：2020-12-24
- 发明人： SUBBARAO, Sanjay , FITZPATRICK, James
- 申请人： MICRON TECHNOLOGY, INC.
- 申请人地址： 8000 South Federal Way Boise, Illinois 83707 US
- 专利权人： MICRON TECHNOLOGY, INC.
- 当前专利权人： MICRON TECHNOLOGY, INC.
- 当前专利权人地址： 8000 South Federal Way Boise, Illinois 83707 US
- 代理机构： WARD, John P. et al.
- 优先权： US62/864,876 20190621; US16/883,839 20200526
- 主分类号： H03M13/11
- IPC分类号： H03M13/11 ; H03M13/29
摘要：
A memory sub-system configured to encode data using an error correcting code and an erasure code for storing data into memory cells and to decode data retrieved from the memory cells. For example, the data units of a predetermined size are separately encoded using the error correcting code (e.g., a low-density parity-check (LDPC) code) to generate parity data of a first layer. Symbols within the data units are cross encoded using the erasure code. Parity symbols of a second layer are calculated according to the erasure code. A collection of parity symbols having a total size equal to the predetermined size can be further encoded using the error correcting code to generate parity data for the parity symbols.
IPC结构图谱:
| H | 电学 |
| --H03 | 基本电子电路 |
| ----H03M | 一般编码、译码或代码转换 |
| ------H03M13/00 | 用于检错或纠错的编码、译码或代码转换；编码理论基本假设；编码约束；误差概率估计方法；信道模型；代码的模拟或测试 |
| --------H03M13/03 | .用数据表示中的冗余项检错或前向纠错，即码字包含比源字更多的位数 |
| ----------H03M13/05 | ..应用分组码，即与预定信息位编号相连的预定校验位编号 |
| ------------H03M13/11 | ...应用多位奇偶校验位的 |