基本信息:
- 专利标题： WORDLINE READ VOLTAGE OFFSETS IN SOLID STATE MEMORY DEVICES
- 申请号：PCT/US2018/022502 申请日：2018-03-14
- 公开(公告)号：WO2019005230A1 公开(公告)日：2019-01-03
- 发明人： KIRSHENBAUM, Roi , INBAR, Karin , GOLDENBERG, Idan , YANG, Nian, Niles , ROM, Rami , BAZARSKY, Alexander , NAVON, Ariel , REUSSWIG, Philip, David
- 申请人： WESTERN DIGITAL TECHNOLOGIES, INC.
- 申请人地址： 5601 Great Oaks Parkway San Jose, CA 95119 US
- 专利权人： WESTERN DIGITAL TECHNOLOGIES, INC.
- 当前专利权人： WESTERN DIGITAL TECHNOLOGIES, INC.
- 当前专利权人地址： 5601 Great Oaks Parkway San Jose, CA 95119 US
- 代理机构： ALTMAN, Daniel, E.
- 优先权： US15/640,356 20170630
- 主分类号： G11C11/56
- IPC分类号： G11C11/56 ; G06N3/02 ; G11C16/26 ; G11C29/02 ; G06F3/06 ; G11C16/04 ; G11C29/50
摘要：
Systems and methods are described for generating location-based read voltage offsets in a data storage device. Optimal read voltage thresholds vary across memory elements of a device. However, data storage devices are often limited in the number of read voltage thresholds that can be maintained in the device. Thus, it may not be possible to maintain optimal read voltage parameters for each memory element within a device. The systems and methods described herein provide for increased accuracy of read voltage thresholds when applied to memory elements within a specific location in a device, by enabling the use of location-based read voltage offsets, depending on a relative location of the memory element being read from. The read voltage offsets can be determined based on application of a neural network to data regarding optimal read voltage thresholds determined from at least a sample of memory elements in a device.
IPC结构图谱:
| G11C11/56 | 组优先于G11C11/02至G11C11/54中各组。 |