基本信息:
- 专利标题: UNIFORM BATCH FILM DEPOSITION PROCESS AND FILMS SO PRODUCED
- 申请号:PCT/US2006/026588 申请日:2006-07-10
- 公开(公告)号:WO2007008705A3 公开(公告)日:2007-01-18
- 发明人: BAILEY, Robert, Jeffrey , QIU, Taiquing, Thomas , PORTER, Cole , LAPARRA, Olivier , CHATHAM, Roert, Hood , MOGAARD, Martin , TREICHEL, Helmuth
- 申请人: AVIZA TECHNOLOGY, INC. , BAILEY, Robert, Jeffrey , QIU, Taiquing, Thomas , PORTER, Cole , LAPARRA, Olivier , CHATHAM, Roert, Hood , MOGAARD, Martin , TREICHEL, Helmuth
- 申请人地址: 440 Kings Village Road, Scotts Valley, CA 95066 US
- 专利权人: AVIZA TECHNOLOGY, INC.,BAILEY, Robert, Jeffrey,QIU, Taiquing, Thomas,PORTER, Cole,LAPARRA, Olivier,CHATHAM, Roert, Hood,MOGAARD, Martin,TREICHEL, Helmuth
- 当前专利权人: AVIZA TECHNOLOGY, INC.,BAILEY, Robert, Jeffrey,QIU, Taiquing, Thomas,PORTER, Cole,LAPARRA, Olivier,CHATHAM, Roert, Hood,MOGAARD, Martin,TREICHEL, Helmuth
- 当前专利权人地址: 440 Kings Village Road, Scotts Valley, CA 95066 US
- 代理机构: GOLDSTEIN, Avery, N. et al.
- 优先权: US60/697,784 20050709; US11/482,887 20060707
- 主分类号: H01L21/00
- IPC分类号: H01L21/00 ; H01L21/20 ; H01L21/324 ; H01L21/477
摘要:
A batch of wafer substrates is provided with each wafer substrate having a surface. Each surface is coated with a layer of material applied simultaneously to the surface of each of the batch of wafer substrates. The layer of material is applied to a thickness that varies less than four thickness percent across the surface and exclusive of an edge boundary and having a wafer-to-wafer thickness variation of less than three percent. The layer of material so applied is a silicon oxide, silicon nitride or silicon oxynitride with the layer of material being devoid of carbon and chlorine. Formation of silicon oxide or a silicon oxynitride requires the inclusion of a co-reactant. Silicon nitride is also formed with the inclusion of a nitrification co-reactant. A process for forming such a batch of wafer substrates involves feeding the precursor into a reactor containing a batch of wafer substrates and reacting the precursor at a wafer substrate temperature, total pressure, and precursor flow rate sufficient to create such a layer of material. The delivery of a precursor and co-reactant as needed through vertical tube injectors having multiple orifices with at least one orifice in registry with each of the batch of wafer substrates and exit slits within the reactor to create flow across the surface of each of the wafer substrates in the batch provides the within- wafer and wafer-to-wafer uniformity.
IPC结构图谱:
H | 电学 |
--H01 | 基本电气元件 |
----H01L | 半导体器件;其他类目未包含的电固体器件 |
------H01L21/00 | 专门适用于制造或处理半导体或固体器件或其部件的方法或设备 |