基本信息:
- 专利标题： 6T FINFET CMOS SRAM CELL WITH AN INCREASED CELL RATIO
- 申请号：PCT/US2004/032442 申请日：2004-09-29
- 公开(公告)号：WO2005034212A3 公开(公告)日：2005-04-14
- 发明人： DATTA, Suman , DOYLE, Brian , CHAU, Robert , KAVALIEROS, Jack , ZHENG, Bo , HARELAND, Scott
- 申请人： INTEL CORPORATION
- 申请人地址： 2200 Mission College Boulevard, Santa Clara, CA 95052 US
- 专利权人： INTEL CORPORATION
- 当前专利权人： INTEL CORPORATION
- 当前专利权人地址： 2200 Mission College Boulevard, Santa Clara, CA 95052 US
- 代理机构： VINCENT, Lester, J.
- 优先权： US10/679,124 20031002
- 主分类号： H01L21/8244
- IPC分类号： H01L21/8244
摘要：
The present invention is a CMOS SRAM cell comprising two access devices, each access device comprised of a tri-gate transistor (400) having a single fin (410); two pull-up devices, each pull-up device comprised of a tri-gate transistor (400) having a single fin (410); and two pull-down devices, each pull-down device comprised of a trigate transistor (500) having multiple fins (410). A method for manufacturing the CMOS SRAM cell, including the dual fin tri-gate transistor is also provided. Due to the fins, the gate length is increased with respect to a planar transistor having the same area. Therefore, the cell ratio and static noise margin are increased, providing improved stability without increasing the cell area on the supply voltage.
IPC结构图谱:
| H | 电学 |
| --H01 | 基本电气元件 |
| ----H01L | 半导体器件；其他类目未包含的电固体器件 |
| ------H01L21/00 | 专门适用于制造或处理半导体或固体器件或其部件的方法或设备 |
| --------H01L21/67 | .专门适用于在制造或处理过程中处理半导体或电固体器件的装置；专门适合于在半导体或电固体器件或部件的制造或处理过程中处理晶片的装置 |
| ----------H01L21/71 | ..限定在组H01L21/70中的器件的特殊部件的制造 |
| ------------H01L21/78 | ...把衬底连续地分成多个独立的器件 |
| --------------H01L21/782 | ....制造多个器件，每一个由单个电路元件组成 |
| ----------------H01L21/822 | .....衬底是采用硅工艺的半导体的 |
| ------------------H01L21/8222 | ......双极工艺 |
| --------------------H01L21/8234 | .......MIS工艺 |
| ----------------------H01L21/8239 | ........存储器结构 |
| ------------------------H01L21/8244 | .........静态随机存取存储结构（SRAM） |