基本信息:
- 专利标题： APPARATUSES INCLUDING CONDUCTIVE STRUCTURE LAYOUTS
- 申请号：US17301758 申请日：2021-04-13
- 公开(公告)号：US20210233858A1 公开(公告)日：2021-07-29
- 发明人： Hirokazu Matsumoto , Ryota Suzuki , Mitsuki Koda , Makoto Sato
- 申请人： MICRON TECHNOLOGY, INC.
- 申请人地址： US ID BOISE
- 专利权人： MICRON TECHNOLOGY, INC.
- 当前专利权人： MICRON TECHNOLOGY, INC.
- 当前专利权人地址： US ID BOISE
- 主分类号： H01L23/538
- IPC分类号： H01L23/538 ; H01L25/18 ; H01L25/065 ; H01L21/768
摘要：
Embodiments of the disclosure are drawn to arrangements of one or more “cuts” or pattern of cuts in conductive structures. Wiring layers may each include a cut pattern including a set of cuts through conductive structures of the wiring layers where each of the cuts is offset from the other in a direction orthogonal to the cut. The cut pattern in a wiring layer may be orthogonal to the cut pattern in another wiring layer. In some examples, the cut pattern may be a stair-step pattern. In some examples, the cut pattern may be interrupted by other conductive structures.
公开/授权文献:
- US11646271B2 Apparatuses including conductive structure layouts 公开/授权日：2023-05-09
IPC结构图谱:
| H | 电学 |
| --H01 | 基本电气元件 |
| ----H01L | 半导体器件；其他类目未包含的电固体器件 |
| ------H01L23/00 | 半导体或其他固态器件的零部件 |
| --------H01L23/34 | .冷却装置；加热装置；通风装置或温度补偿装置 |
| ----------H01L23/538 | ..制作在绝缘衬底上或内的多个半导体芯片间的互连结构 |