发明申请
US20190136207A1 Arrays Of Memory Cells Individually Comprising A Capacitor And An Elevationally-Extending Transistor, Methods Of Forming A Tier Of An Array Of Memory Cells, And Methods Of Forming An Array Of Memory Cells Individually Comprising A Capacitor And An Elevationally-Extending Transistor
审中-公开
基本信息:
- 专利标题： Arrays Of Memory Cells Individually Comprising A Capacitor And An Elevationally-Extending Transistor, Methods Of Forming A Tier Of An Array Of Memory Cells, And Methods Of Forming An Array Of Memory Cells Individually Comprising A Capacitor And An Elevationally-Extending Transistor
- 申请号：US16238689 申请日：2019-01-03
- 公开(公告)号：US20190136207A1 公开(公告)日：2019-05-09
- 发明人： Durai Vishak Nirmal Ramaswamy
- 申请人： Micron Technology, Inc.
- 申请人地址： US ID Boise
- 专利权人： Micron Technology, Inc.
- 当前专利权人： Micron Technology, Inc.
- 当前专利权人地址： US ID Boise
- 主分类号： C12N7/00
- IPC分类号： C12N7/00 ; H01L27/11507 ; H01L27/108 ; H01L49/02 ; C12Q1/70 ; C12N15/113
摘要：
A method of forming a tier of an array of memory cells within an array area, the memory cells individually comprising a capacitor and an elevationally-extending transistor, the method comprising using two, and only two, sacrificial masking steps within the array area of the tier in forming the memory cells. Other methods are disclosed, as are structures independent of method of fabrication.