基本信息:
- 专利标题： VIA SUPPORT STRUCTURE UNDER PAD AREAS FOR BSI BONDABILITY IMPROVEMENT
- 申请号：US16167844 申请日：2018-10-23
- 公开(公告)号：US20190057998A1 公开(公告)日：2019-02-21
- 发明人： Sin-Yao Huang , Ching-Chun Wang , Dun-Nian Yaung , Feng-Chi Hung
- 申请人： Taiwan Semiconductor Manufacturing Co., Ltd.
- 主分类号： H01L27/146
- IPC分类号： H01L27/146
摘要：
The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a substrate and a first interconnect wire arranged within a dielectric structure on the substrate. A bond pad contacts the first interconnect wire. A via support structure has one or more vias arranged within the dielectric structure at a location separated from the substrate by the first interconnect wire, The via support structure has a metal pattern density that is greater than or equal to approximately 19% and that is configured to mitigate damage caused by a force of a bonding process on the bond pad.
公开/授权文献:
IPC结构图谱:
| H | 电学 |
| --H01 | 基本电气元件 |
| ----H01L | 半导体器件；其他类目未包含的电固体器件 |
| ------H01L27/00 | 由在一个共用衬底内或其上形成的多个半导体或其他固态组件组成的器件 |
| --------H01L27/02 | .包括有专门适用于整流、振荡、放大或切换的半导体组件并且至少有一个电位跃变势垒或者表面势垒的；包括至少有一个跃变势垒或者表面势垒的无源集成电路单元的 |
| ----------H01L27/144 | ..由辐射控制的器件 |
| ------------H01L27/146 | ...图像结构 |