基本信息:
- 专利标题： CHIP PACKAGING METHOD
- 申请号：US15751790 申请日：2016-05-20
- 公开(公告)号：US20190035642A1 公开(公告)日：2019-01-31
- 发明人： Yuedong QIU , Chengchung LIN
- 申请人： SJ SEMICONDUCTOR (JIANGYIN) CORPORATION
- 申请人地址： CN Jiangyin
- 专利权人： SJ SEMICONDUCTOR (JIANGYIN) CORPORATION
- 当前专利权人： SJ SEMICONDUCTOR (JIANGYIN) CORPORATION
- 当前专利权人地址： CN Jiangyin
- 优先权： CN2015105756378 20150910
- 国际申请： PCT/CN2016/082779 WO 20160520
- 主分类号： H01L21/56
- IPC分类号： H01L21/56 ; H01L23/00
摘要：
The method of chip packaging comprises: S1: providing a carrier, and forming an adhesive layer on a surface of the carrier; S2: forming a first dielectric layer on a surface of the adhesive layer, and forming a plurality of first through holes corresponding to electrical leads of a semiconductor chip in the dielectric layer; S3: attaching the semiconductor chip with the front surface facing downwards to the surface of the first dielectric layer; S4: forming a plastic encapsulation layer covering the chip on the surface of the first dielectric layer; S5: separating the adhesive layer and the first dielectric layer to remove the carrier and the adhesive layer; and S6: forming a redistribution layer for the semiconductor chip based on the first dielectric layer and the first through holes.
公开/授权文献:
- US10553458B2 Chip packaging method 公开/授权日：2020-02-04
IPC结构图谱:
| H | 电学 |
| --H01 | 基本电气元件 |
| ----H01L | 半导体器件；其他类目未包含的电固体器件 |
| ------H01L21/00 | 专门适用于制造或处理半导体或固体器件或其部件的方法或设备 |
| --------H01L21/02 | .半导体器件或其部件的制造或处理 |
| ----------H01L21/027 | ..未在H01L21/18或H01L21/34组中包含的为进一步的光刻工艺在半导体之上制作掩膜 |
| ------------H01L21/50 | ...应用H01L21/06至H01L21/326中的任一小组都不包含的方法或设备组装半导体器件的 |
| --------------H01L21/56 | ....封装，例如密封层、涂层 |