基本信息:
- 专利标题： Controlling Power Delivery To A Processor Via A Bypass
- 申请号：US15804020 申请日：2017-11-06
- 公开(公告)号：US20180059751A1 公开(公告)日：2018-03-01
- 发明人： Sanjeev S. Jahagirdar , Satish K. Damaraju , Yun-Han Chen , Ryan D. Wells , Inder M. Sodhi , Vishram Sarurkar , Ken Drottar , Ashish V. Choubal , Rabiul Islam
- 申请人： Intel Corporation
- 主分类号： G06F1/26
- IPC分类号： G06F1/26 ; G06F1/32 ; G06F9/50
摘要：
In one embodiment, a processor includes a plurality of domains each to operate at an independently controllable voltage and frequency, a plurality of linear regulators each to receive a first voltage from an off-chip source and controllable to provide a regulated voltage to at least one of the plurality of domains, and a plurality of selectors each coupled to one of the domains, where each selector is configured to provide a regulated voltage from one of the linear regulators or a bypass voltage to a corresponding domain. Other embodiments are described and claimed.
公开/授权文献:
- US10146283B2 Controlling power delivery to a processor via a bypass 公开/授权日：2018-12-04
IPC结构图谱:
| G | 物理 |
| --G06 | 计算；推算；计数 |
| ----G06F | 电数字数据处理 |
| ------G06F1/00 | 不包括在G06F3/00至G06F13/00和G06F21/00各组的数据处理设备的零部件 |
| --------G06F1/26 | .电源装置例如稳压装置 |