基本信息:
- 专利标题： PACKAGE ASSEMBLY
- 申请号：US15712680 申请日：2017-09-22
- 公开(公告)号：US20180012860A1 公开(公告)日：2018-01-11
- 发明人： Hung-Jen Lin , Tsung-Ding Wang , Chien-Hsiun Lee , Wen-Hsiung Lu , Ming-Da Cheng , Chung-Shi Liu
- 申请人： Taiwan Semiconductor Manufacturing Co., Ltd.
- 主分类号： H01L23/00
- IPC分类号： H01L23/00 ; H01L21/768 ; H01L23/31 ; H01L21/56 ; H01L23/525
摘要：
In some embodiments, the present disclosure relates to a package assembly having a bump on a first substrate. A molding compound is on the first substrate and contacts sidewalls of the bump. A no-flow underfill layer is on a conductive region of a second substrate. The no-flow underfill layer and the conductive region contact the bump. A mask layer is arranged on the second substrate and laterally surrounds the no-flow underfill layer. The no-flow underfill layer contacts the substrate between the conductive region and the mask layer.
公开/授权文献:
- US10192848B2 Package assembly 公开/授权日：2019-01-29
IPC结构图谱:
| H | 电学 |
| --H01 | 基本电气元件 |
| ----H01L | 半导体器件；其他类目未包含的电固体器件 |
| ------H01L23/00 | 半导体或其他固态器件的零部件 |