基本信息:
- 专利标题： VERTICAL MEMORY DEVICES HAVING DUMMY CHANNEL REGIONS
- 申请号：US15626395 申请日：2017-06-19
- 公开(公告)号：US20170294443A1 公开(公告)日：2017-10-12
- 发明人： JONG WON KIM , SEUNG HYUN LIM , CHANG SEOK KANG , YOUNG WOO PARK , DAE HOON BAE , DONG SEOG EUN , WOO SUNG LEE , JAE DUK LEE , JAE WOO LIM , HANMEI CHOI
- 申请人： JONG WON KIM , SEUNG HYUN LIM , CHANG SEOK KANG , YOUNG WOO PARK , DAE HOON BAE , DONG SEOG EUN , WOO SUNG LEE , JAE DUK LEE , JAE WOO LIM , HANMEI CHOI
- 优先权： KR10-2015-0111358 20150807
- 主分类号： H01L27/11565
- IPC分类号： H01L27/11565 ; H01L27/11524 ; H01L27/11556 ; H01L29/04 ; H01L27/1157 ; H01L27/11582 ; H01L27/11573 ; H01L27/11519 ; H01L27/11529
摘要：
A memory device includes a plurality of channel regions that each extend in a direction perpendicular to an upper surface of a substrate, a plurality of gate electrode layers and a plurality of insulating layers stacked on the substrate adjacent the channel regions, each of the gate electrodes extending different lengths, and a plurality of dummy channel regions adjacent first ends of the plurality of gate electrode layers, wherein the substrate includes a substrate insulating layer formed below the plurality of dummy channel regions.
公开/授权文献:
- US09972636B2 Vertical memory devices having dummy channel regions 公开/授权日：2018-05-15
IPC结构图谱:
| H | 电学 |
| --H01 | 基本电气元件 |
| ----H01L | 半导体器件；其他类目未包含的电固体器件 |
| ------H01L27/00 | 由在一个共用衬底内或其上形成的多个半导体或其他固态组件组成的器件 |
| --------H01L27/02 | .包括有专门适用于整流、振荡、放大或切换的半导体组件并且至少有一个电位跃变势垒或者表面势垒的；包括至少有一个跃变势垒或者表面势垒的无源集成电路单元的 |
| ----------H01L27/04 | ..其衬底为半导体的 |
| ------------H01L27/06 | ...在非重复结构中包括有多个单个组件的 |
| --------------H01L27/105 | ....包含场效应组件的 |
| ----------------H01L27/112 | .....只读存储器结构的 |
| ------------------H01L27/115 | ......电动编程只读存储器 |
| --------------------H01L27/11502 | .......具有铁电体存储器电容器的 |
| ----------------------H01L27/11565 | ........以顶视图布局为特征的 |