发明申请
US20170163256A1 Devices and Methods for Improving Voltage Handling and/or Bi-Directionality of Stacks of Elements when Connected Between Terminals
审中-公开
基本信息:
- 专利标题： Devices and Methods for Improving Voltage Handling and/or Bi-Directionality of Stacks of Elements when Connected Between Terminals
- 申请号：US15442491 申请日：2017-02-24
- 公开(公告)号：US20170163256A1 公开(公告)日：2017-06-08
- 发明人： Tero Tapio Ranta , Shawn Bawell , Robert W. Greene , Christopher N. Brindle , Robert Mark Englekirk
- 申请人： Peregrine Semiconductor Corporation
- 主分类号： H03K17/16
- IPC分类号： H03K17/16 ; H01G7/00 ; H01G4/002
摘要：
Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals are described. Such devices and method include use of symmetrical compensation capacitances, symmetrical series capacitors, or symmetrical sizing of the elements of the stack.
公开/授权文献:
IPC结构图谱:
| H | 电学 |
| --H03 | 基本电子电路 |
| ----H03K | 脉冲技术 |
| ------H03K17/00 | 电子开关或选通，即不通过通断接触的 |
| --------H03K17/16 | .消除干扰电压或电流的改进 |