发明申请
US20150340449A1 GALLIUM NITRIDE FIELD EFFECT TRANSISTOR WITH BURIED FIELD PLATE PROTECTED LATERAL CHANNEL
审中-公开
![GALLIUM NITRIDE FIELD EFFECT TRANSISTOR WITH BURIED FIELD PLATE PROTECTED LATERAL CHANNEL](/abs-image/US/2015/11/26/US20150340449A1/abs.jpg.150x150.jpg)
基本信息:
- 专利标题: GALLIUM NITRIDE FIELD EFFECT TRANSISTOR WITH BURIED FIELD PLATE PROTECTED LATERAL CHANNEL
- 申请号:US14813661 申请日:2015-07-30
- 公开(公告)号:US20150340449A1 公开(公告)日:2015-11-26
- 发明人: Ozgur Aktas , Isik C. Kizilyalli
- 申请人: AVOGY, INC.
- 申请人地址: US CA San Jose
- 专利权人: AVOGY, INC.
- 当前专利权人: AVOGY, INC.
- 当前专利权人地址: US CA San Jose
- 主分类号: H01L29/40
- IPC分类号: H01L29/40 ; H01L29/20 ; H01L29/10 ; H01L29/78
摘要:
A method for fabricating a lateral gallium nitride (GaN) field-effect transistor includes forming a first and second GaN layer coupled to a substrate, removing a first portion of the second GaN layer to expose a portion of the first GaN layer, and forming a third GaN layer coupled to the second GaN layer and the exposed portion of the first GaN layer. The method also includes removing a portion of the third GaN layer to expose a portion of the second GaN layer, forming a source structure coupled to the third GaN layer. A first portion of the second GaN layer is disposed between the source structure and the second GaN layer. A drain structure is formed that is coupled to the third GaN layer or alternatively to the substrate. The method also includes forming a gate structure coupled to the third GaN layer such that a second portion of the third GaN layer is disposed between the gate structure and the second GaN layer.
公开/授权文献:
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