
基本信息:
- 专利标题: MEMORY CORE AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME
- 专利标题(中):存储核心和半导体存储器件,包括它们
- 申请号:US13304851 申请日:2011-11-28
- 公开(公告)号:US20120212989A1 公开(公告)日:2012-08-23
- 发明人: Hak-Soo YU , Su-A Kim , Hong-Sun Hwang , Chul-Woo Park
- 申请人: Hak-Soo YU , Su-A Kim , Hong-Sun Hwang , Chul-Woo Park
- 优先权: KR10-2011-0014766 20110218
- 主分类号: G11C5/02
- IPC分类号: G11C5/02
摘要:
A semiconductor memory device is disclosed. The semiconductor memory device includes a memory array block, a first word line and a second word line. The memory array block includes a plurality of adjacent columns of memory cells, each column of memory cells including a plurality of consecutive memory cells having a plurality of respective consecutive cell transistors that comprise at least a first group of cell transistors and a second group of cell transistors. The first word line is disposed above the plurality of respective consecutive cell transistors and electrically connected to the first group of cell transistors, and the second word line is disposed below the plurality of respective consecutive cell transistors and electrically connected to the second group of cell transistors.
摘要(中):
公开了一种半导体存储器件。 半导体存储器件包括存储器阵列块,第一字线和第二字线。 存储器阵列块包括多个相邻列的存储器单元,每列存储器单元包括多个连续的存储单元,其具有多个相应的连续单元晶体管,其包括至少第一组单元晶体管和第二组单元 晶体管。 第一字线设置在多个相应的连续单元晶体管的上方并电连接到第一组单元晶体管,第二字线设置在多个相应的连续单元晶体管的下方,并电连接到第二组单元晶体管 。
公开/授权文献:
IPC结构图谱:
G | 物理 |
--G11 | 信息存储 |
----G11C | 静态存储器 |
------G11C5/00 | 包括在G11C11/00组中的存储器零部件 |
--------G11C5/02 | .存储元件的排列,例如,矩阵形式的排列 |