发明申请
US20120061737A1 SEMICONDUCTOR DEVICE, METHOD OF FABRICATING THE SAME, AND PATTERNING MASK UTILIZIED BY THE METHOD
有权
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基本信息:
- 专利标题: SEMICONDUCTOR DEVICE, METHOD OF FABRICATING THE SAME, AND PATTERNING MASK UTILIZIED BY THE METHOD
- 专利标题(中):半导体器件,其制造方法以及由该方法使用的掩模图案
- 申请号:US13301657 申请日:2011-11-21
- 公开(公告)号:US20120061737A1 公开(公告)日:2012-03-15
- 发明人: Yi-Chun Lin , Kuo-Ming Wu , Ruey-Hsin Liu
- 申请人: Yi-Chun Lin , Kuo-Ming Wu , Ruey-Hsin Liu
- 主分类号: H01L29/78
- IPC分类号: H01L29/78 ; B32B3/00 ; H01L21/336 ; B82Y99/00
摘要:
A semiconductor device. The device comprises an active region isolated by an isolation structure on a substrate. The device further comprises a gate electrode extending across the active area and overlying the substrate, a pair of source region and drain region, disposed on either side of the gate electrode on the substrate in the active area, and a gate dielectric layer disposed between the substrate and the gate electrode. The gate dielectric layer comprises a relatively-thicker high voltage (HV) dielectric portion and a relatively-thinner low voltage (LV) dielectric portion, wherein the HV dielectric portion occupies a first intersection among the drain region, the isolation structure, and the gate electrode, and a second intersection among the source region, the isolation structure, and the gate electrode.
摘要(中):
半导体器件。 该器件包括由衬底上的隔离结构隔离的有源区。 该器件还包括延伸跨过有源区并覆盖衬底的栅电极,一对源极区和漏极区,设置在有源区中的衬底上的栅电极的任一侧上,栅电介质层位于 基板和栅电极。 栅介质层包括相对较厚的高电压(HV)电介质部分和相对较薄的低电压(LV)电介质部分,其中HV电介质部分占据漏区,隔离结构和栅极之间的第一交点 电极,以及源区域,隔离结构和栅电极之间的第二交叉点。
公开/授权文献:
IPC结构图谱:
H | 电学 |
--H01 | 基本电气元件 |
----H01L | 半导体器件;其他类目未包含的电固体器件 |
------H01L29/00 | 专门适用于整流、放大、振荡或切换,并具有至少一个电位跃变势垒或表面势垒的半导体器件;具有至少一个电位跃变势垒或表面势垒,例如PN结耗尽层或载流子集结层的电容器或电阻器;半导体本体或其电极的零部件 |
--------H01L29/02 | .按其半导体本体的特征区分的 |
----------H01L29/68 | ..只能通过对一个不通有待整流、放大或切换的电流的电极供给电流或施加电位方可进行控制的 |
------------H01L29/70 | ...双极器件 |
--------------H01L29/762 | ....电荷转移器件 |
----------------H01L29/78 | .....由绝缘栅产生场效应的 |