
基本信息:
- 专利标题: HYBRID DATA TRANSMISSION CIRCUIT
- 专利标题(中):混合数据传输电路
- 申请号:US13242962 申请日:2011-09-23
- 公开(公告)号:US20120008713A1 公开(公告)日:2012-01-12
- 发明人: Tsuyoshi EBUCHI , Yoshihide Komatsu
- 申请人: Tsuyoshi EBUCHI , Yoshihide Komatsu
- 申请人地址: JP Osaka
- 专利权人: PANASONIC CORPORATION
- 当前专利权人: PANASONIC CORPORATION
- 当前专利权人地址: JP Osaka
- 优先权: JP2009-116281 20090513
- 主分类号: H04L27/00
- IPC分类号: H04L27/00
摘要:
A data transmitter having a parallel-to-serial conversion function is supplied with a clock by a PLL circuit unit. In the PLL circuit unit, a first multiphase clock supplied to a first parallel-to-serial conversion circuit is generated and output by a multiphase VCO circuit, while a second multiphase clock supplied to a second parallel-to-serial conversion circuit is generated and output by a multiphase clock generator. The multiphase clock generator generates the second multiphase clock based on the clock output from the multiphase VCO circuit.
摘要(中):
具有并行到串行转换功能的数据发射机由PLL电路单元提供时钟。 在PLL电路单元中,提供给第一并行转换电路的第一多相时钟由多相VCO电路产生并输出,同时产生提供给第二并行 - 串行转换电路的第二多相时钟, 由多相时钟发生器输出。 多相时钟发生器基于来自多相VCO电路的时钟输出产生第二多相时钟。
公开/授权文献:
- US08265195B2 Hybrid data transmission circuit 公开/授权日:2012-09-11