
基本信息:
- 专利标题: INTEGRATED STRUCTURE OF IGBT AND DIODE AND METHOD OF FORMING THE SAME
- 专利标题(中):IGBT和二极管的集成结构及其形成方法
- 申请号:US12563172 申请日:2009-09-21
- 公开(公告)号:US20100301386A1 公开(公告)日:2010-12-02
- 发明人: Wei-Chieh Lin , Ho-Tai Chen , Jen-Hao Yeh , Li-Cheng Lin , Shih-Chieh Hung
- 申请人: Wei-Chieh Lin , Ho-Tai Chen , Jen-Hao Yeh , Li-Cheng Lin , Shih-Chieh Hung
- 优先权: TW098118166 20090602
- 主分类号: H01L27/06
- IPC分类号: H01L27/06 ; H01L21/77
摘要:
An integrated structure of an IGBT and a diode includes a plurality of doped cathode regions, and a method of forming the same is provided. The doped cathode regions are stacked in a semiconductor substrate, overlapping and contacting with each other. As compared with other doped cathode regions, the higher a doped cathode region is disposed, the larger implantation area the doped cathode region has. The doped cathode regions and the semiconductor substrate have different conductive types, and are applied as a cathode of the diode and a collector of the IGBT. The stacked doped cathode regions can increase the thinness of the cathode, and prevent the wafer from being overly thinned and broken.
摘要(中):
IGBT和二极管的集成结构包括多个掺杂的阴极区域,并且提供其形成方法。 掺杂阴极区域堆叠在半导体衬底中,彼此重叠并接触。 与其他掺杂阴极区域相比,掺杂阴极区域越高,掺杂阴极区域的注入面积越大。 掺杂阴极区域和半导体衬底具有不同的导电类型,并且被施加作为二极管的阴极和IGBT的集电极。 堆叠的掺杂阴极区域可以增加阴极的薄度,并且防止晶片过度变薄和破裂。
公开/授权文献:
IPC结构图谱:
H | 电学 |
--H01 | 基本电气元件 |
----H01L | 半导体器件;其他类目未包含的电固体器件 |
------H01L27/00 | 由在一个共用衬底内或其上形成的多个半导体或其他固态组件组成的器件 |
--------H01L27/02 | .包括有专门适用于整流、振荡、放大或切换的半导体组件并且至少有一个电位跃变势垒或者表面势垒的;包括至少有一个跃变势垒或者表面势垒的无源集成电路单元的 |
----------H01L27/04 | ..其衬底为半导体的 |
------------H01L27/06 | ...在非重复结构中包括有多个单个组件的 |