基本信息:
- 专利标题： Semiconductor Memory Device Having Three Dimensional Structure
- 专利标题（中）：具有三维结构的半导体存储器件
- 申请号：US12537521 申请日：2009-08-07
- 公开(公告)号：US20090294863A1 公开(公告)日：2009-12-03
- 发明人： Gong-Heum Han , Hyou-Youn Nam , Bo-Tak Lim , Han-Byung Park , Soon-Moon Jung , Hoon Lim
- 申请人： Gong-Heum Han , Hyou-Youn Nam , Bo-Tak Lim , Han-Byung Park , Soon-Moon Jung , Hoon Lim
- 专利权人： Samsung Electronics Co., Ltd.
- 当前专利权人： Samsung Electronics Co., Ltd.
- 优先权： KR2004-61527 20040804; KR2005-38621 20050509
- 主分类号： H01L29/66
- IPC分类号： H01L29/66
摘要：
A semiconductor device and method for arranging and manufacturing the same are disclosed. The semiconductor device includes a plurality of inverters including at least one first pull-up transistor and first pull-down transistor and inverting and outputting an input signal, respectively; and a plurality of NAND gates including at least two second pull-up transistor and second pull-down transistor and generating an output signal having a high level if at least one of at least two input signals has a low level, respectively, wherein the at least one first pull-up transistor and first pull-down transistor and the at least two second pull-up transistor and second pull-down transistor are stacked and arranged on at least two layers.
摘要（中）：
公开了一种半导体装置及其制造方法。 半导体器件包括多个反相器，包括至少一个第一上拉晶体管和第一下拉晶体管，并分别反相并输出输入信号; 以及包括至少两个第二上拉晶体管和第二下拉晶体管的多个NAND门，并且如果至少两个输入信号中的至少一个分别具有低电平，则产生具有高电平的输出信号，其中at 至少一个第一上拉晶体管和第一下拉晶体管和至少两个第二上拉晶体管和第二下拉晶体管堆叠并布置在至少两层上。