基本信息:
- 专利标题: 高速/高性能MOS電晶體及其製造方法
- 专利标题(英):MOS transistor for high-speed and high-performance operation and manufacturing method thereof
- 专利标题(中):高速/高性能MOS晶体管及其制造方法
- 申请号:TW087119469 申请日:1998-11-24
- 公开(公告)号:TW407323B 公开(公告)日:2000-10-01
- 发明人: 金賢植 , 申憲宗 , 李受哲
- 申请人: 三星電子股份有限公司
- 申请人地址: 韓國
- 专利权人: 三星電子股份有限公司
- 当前专利权人: 三星電子股份有限公司
- 当前专利权人地址: 韓國
- 代理人: 惲軼群; 陳文郎
- 主分类号: H01L
- IPC分类号: H01L
A MOS transistor of the present invention includes a semiconductor substrate included with a first conduction type-impurity; a gate insulating layer formed on the semiconductor substrate; gate electrodes formed on the gate insulating layer; an oxide layer formed by the surface oxidation of the gate electrodes; a first spacer formed on the side wall of the gate electrodes; a second spacer formed on the inclined side wall; a first impurity layer of low concentration formed in a first depth by a second conduction type-impurity implanted in the vicinity of surface of the semiconductor substrate to be self-aligned at the edge of the gate electrode; a second impurity layer of middle concentration formed in a deeper second depth than the first depth by the second conduction type-impurity implanted in the vicinity of surface of the semiconductor substrate; a third impurity layer having higer impurity concentration than that of the semiconducor, the third impurity formed in a third depth for surrounding the second impurity layer of middle concentration by a first conduction type-impurity implanted in the vicinity of surface of the semiconductor substrate to be self-aligned at the edge of the first spacer; and a fourth impurity layer of high concentration formed in a fourth depth deeper than the third depth by the second conduction type-impurity implanted in the vicinity of the surface of the seminconductor substrate to be aligned at the edge of the second spacer.