基本信息:
- 专利标题： 半導體裝置及其製造方法
- 专利标题（英）：Method for manufacturing semiconductor device and semiconductor device
- 专利标题（中）：半导体设备及其制造方法
- 申请号：TW105106189 申请日：2016-03-01
- 公开(公告)号：TW201715663A 公开(公告)日：2017-05-01
- 发明人： 本間荘一 , HOMMA, SOICHI , 志摩真也 , SHIMA, MASAYA , 高野勇佑 , TAKANO, YUUSUKE , 渡部武志 , WATANABE, TAKESHI , 澁谷克則 , SHIBUYA, KATSUNORI
- 申请人： 東芝股份有限公司 , KABUSHIKI KAISHA TOSHIBA
- 专利权人： 東芝股份有限公司,KABUSHIKI KAISHA TOSHIBA
- 当前专利权人： 東芝股份有限公司,KABUSHIKI KAISHA TOSHIBA
- 代理人： 陳長文
- 优先权： 2015-145612 20150723
- 主分类号： H01L23/31
- IPC分类号： H01L23/31 ; H01L25/065 ; H01L21/52 ; H01L21/56 ; H01L21/78 ; H01L23/495 ; H01L21/48
In a method for manufacturing a semiconductor device, a resin layer including an inorganic filler is molded on a surface of a substrate which includes semiconductor elements attached thereto by an adhesive, and terminals electrically connected to the semiconductor elements on another surface thereof. The molded substrate is cut so as to expose a conductive body electrically connected to an external terminal maintainable at ground potential. The surface of the resin layer of the substrate is sputter-etched in a vacuum environment, in a state where a plurality of the cut substrates is provided in a tray so that the surface of the substrate faces the tray. A metal layer is sputtered so as to be electrically connected to the conductive body on the surface and the cut surface in a state where the substrate is provided in the tray while maintaining the vacuum environment after sputter-etching.
公开/授权文献:
- TWI624014B 半導體裝置及其製造方法 公开/授权日：2018-05-11
信息查询:
EspacenetIPC结构图谱:
| H | 电学 |
| --H01 | 基本电气元件 |
| ----H01L | 半导体器件；其他类目未包含的电固体器件 |
| ------H01L23/00 | 半导体或其他固态器件的零部件 |
| --------H01L23/02 | .容器；封接 |
| ----------H01L23/31 | ..按配置特点进行区分的 |