基本信息:
- 专利标题： 具有導電蝕刻停止層的電阻式隨機存取記憶體單元結構
- 专利标题（英）：RRAM cell structure with conductive etch-stop layer
- 专利标题（中）：具有导电蚀刻停止层的电阻式随机存取内存单元结构
- 申请号：TW103146487 申请日：2014-12-31
- 公开(公告)号：TW201539730A 公开(公告)日：2015-10-16
- 发明人： 劉銘棋 , LIU, MING CHYI , 曾元泰 , TSENG, YUAN TAI , 徐晨祐 , HSU, CHERN YOW , 劉世昌 , LIU, SHIH CHANG , 蔡嘉雄 , TSAI, CHIA SHIUNG
- 申请人： 台灣積體電路製造股份有限公司 , TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 申请人地址： 新竹市
- 专利权人： 台灣積體電路製造股份有限公司,TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人： 台灣積體電路製造股份有限公司,TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人地址： 新竹市
- 代理人： 洪澄文; 顏錦順
- 优先权： 14/196,361 20140304
- 主分类号： H01L27/24
- IPC分类号： H01L27/24 ; H01L45/00
The present disclosure relates to a resistive random access memory (RRAM) device architecture, that includes a thin single layer of a conductive etch-stop layer between a lower metal interconnect and a bottom electrode of an RRAM cell. The conductive etch-stop layer provides simplicity in structure and the etch-selectivity of this layer provides protection to the underlying layers. The conductive etch stop layer can be etched using a dry or wet etch to land on the lower metal interconnect. In instances where the lower metal interconnect is copper, etching the conductive etch stop layer to expose the copper does not produce as much non-volatile copper etching by-products as in traditional methods. Compared to traditional methods, some embodiments of the disclosed techniques reduce the number of mask step and also reduce chemical mechanical polishing during the formation of the bottom electrode.
信息查询:
EspacenetIPC结构图谱:
| H | 电学 |
| --H01 | 基本电气元件 |
| ----H01L | 半导体器件；其他类目未包含的电固体器件 |
| ------H01L27/00 | 由在一个共用衬底内或其上形成的多个半导体或其他固态组件组成的器件 |
| --------H01L27/24 | .包括无电位跃变势垒或表面势垒的用于整流、放大，或切换的固态组件的 |