基本信息:
- 专利标题： 記憶體元件以及用於記憶體元件之感測及閂鎖電路
- 专利标题（英）：Memory device, and sensing and latching circuit of memory device
- 专利标题（中）：内存组件以及用于内存组件之传感及闩锁电路
- 申请号：TW101146785 申请日：2012-12-12
- 公开(公告)号：TW201324526A 公开(公告)日：2013-06-16
- 发明人： 金燦景 , KIM, CHAN-KYUNG , 李潤相 , LEE, YUN-SANG , 朴哲佑 , PARK, CHUL-WOO , 黃泓善 , HWANG, HONG-SUN
- 申请人： 三星電子股份有限公司 , SAMSUNG ELECTRONICS CO., LTD.
- 专利权人： 三星電子股份有限公司,SAMSUNG ELECTRONICS CO., LTD.
- 当前专利权人： 三星電子股份有限公司,SAMSUNG ELECTRONICS CO., LTD.
- 代理人： 詹銘文
- 优先权： 61/569,320 20111212;10-2012-0118306 20121024;13/705,143 20121204
- 主分类号： G11C7/06
- IPC分类号： G11C7/06 ; G11C7/08
A memory device having a first switch configured to receive a first CSL signal to input or output data is provided. A second switch is configured to receive a second CSL signal. A sensing and latch circuit (SLC) is coupled between the first and second switches. And at least one memory cell is coupled to the second switch. The second switch is configured to control timing of read or write operations of the at least one memory cell in response to the second CSL signal, e.g., where a read operation can be performed in not more than about 5ns. The SLC operates as a latch in a write mode and as an amplifier in a read mode. The memory device may comprise part of a memory system or other apparatus including such memory device or system. Methods of performing read and write operations using such memory device are also provided.
公开/授权文献:
- TWI585774B 記憶體元件以及用於記憶體元件之感測及閂鎖電路 公开/授权日：2017-06-01
信息查询:
EspacenetIPC结构图谱:
| G | 物理 |
| --G11 | 信息存储 |
| ----G11C | 静态存储器 |
| ------G11C7/00 | 数字存储器信息的写入或读出装置 |
| --------G11C7/06 | .读出放大器；相关的电路 |