基本信息:
- 专利标题： 佈局電路 LAYOUT CIRCUIT
- 专利标题（英）：Layout circuit
- 专利标题（中）：布局电路 LAYOUT CIRCUIT
- 申请号：TW096149864 申请日：2007-12-25
- 公开(公告)号：TW200842635A 公开(公告)日：2008-11-01
- 发明人： 李錦智 LI, CHING CHIH
- 申请人： 聯發科技股份有限公司 MEDIATEK INC.
- 申请人地址： 新竹市新竹科學工業園區篤行一路1號
- 专利权人： 聯發科技股份有限公司 MEDIATEK INC.
- 当前专利权人： 聯發科技股份有限公司 MEDIATEK INC.
- 当前专利权人地址： 新竹市新竹科學工業園區篤行一路1號
- 代理人： 洪澄文; 顏錦順
- 优先权： 美國 60/912,704 20070419 美國 11/853,061 20070911
- 主分类号： G06F
- IPC分类号： G06F ; H01L
The layout circuit comprises a first 3x2 grid array and a second 3x2 grid array. The first 3x2 grid array comprises first, second and third signal contact points and the first and second fixed potential contact points are coupled to a first fixed potential. The first and second fixed potential contact points are arranged diagonally into the first 2x2 array and the first and second signal contact points are also arranged diagonally into the first 2x2 array. The second 3x2 grid array comprises fourth, fifth and sixth signal contact points and the third and fourth fixed potential contact points are coupled to the first fixed potential. The third and fourth fixed potential contact points are arranged diagonally into the second 2x2 array and the fourth and fifth signal contact points are also arranged diagonally into the second 2x2 array.
公开/授权文献:
- TWI365390B 佈局電路 LAYOUT CIRCUIT 公开/授权日：2012-06-01