基本信息:
- 专利标题: 반도체 웨이퍼 및 그 제조 방법
- 专利标题(英):Semiconductor wafer and method for manufacturing same
- 专利标题(中):半导体晶片及其制造方法
- 申请号:KR1020137028156 申请日:2012-04-03
- 公开(公告)号:KR1020140048869A 公开(公告)日:2014-04-24
- 发明人: 사토,미치토
- 申请人: 신에쯔 한도타이 가부시키가이샤
- 申请人地址: *-*, Ohtemachi *-chome, Chiyoda-ku, Tokyo, Japan
- 专利权人: 신에쯔 한도타이 가부시키가이샤
- 当前专利权人: 신에쯔 한도타이 가부시키가이샤
- 当前专利权人地址: *-*, Ohtemachi *-chome, Chiyoda-ku, Tokyo, Japan
- 代理人: 특허법인씨엔에스
- 优先权: JPJP-P-2011-098241 2011-04-26
- 国际申请: PCT/JP2012/002304 2012-04-03
- 国际公布: WO2012147279 2012-11-01
- 主分类号: H01L21/304
- IPC分类号: H01L21/304
The present invention, in the semiconductor wafer is formed in the outer peripheral sag at the time of polishing, the center of the outer deflection displacement in the thickness direction of the semiconductor wafer between the start position of the semiconductor wafer and 100㎚ below, the center of the semiconductor wafer a convex shape, the outer peripheral deflection of the semiconductor wafer is 100㎚ or less, and the center than the outer peripheral portion of the semiconductor wafer in which the outer deflection starting position being a 20㎜ than the core side or the object to be measured from the peripheral edge of the semiconductor wafer ESFQR It provides a semiconductor wafer, characterized in that cheukin. In this way, the same processing conditions, SFQR, and the ESFQR, ZDD, ROA, GBIR, object of the present invention to a plurality of flattened, such as the SBIR also provided at the same time, the semiconductor wafer and a manufacturing method thereof which can satisfy the surface.
公开/授权文献:
- KR101774850B1 반도체 웨이퍼 및 그 제조 방법 公开/授权日:2017-09-05