基本信息:
- 专利标题： 박형 웨이퍼 핸들링을 위한 다중 본딩 층
- 专利标题（英）：Multiple bonding layers for thin-wafer handling
- 专利标题（中）：多层结合层用于薄膜处理
- 申请号：KR1020147003864 申请日：2011-08-05
- 公开(公告)号：KR1020140039330A 公开(公告)日：2014-04-01
- 发明人： 풀리가다,라마 , 종,싱-푸 , 플래임,토니,디. , 맥커천,제레미
- 申请人： 브레우어 사이언스 인코포레이션
- 申请人地址： **** Brewer Drive, Rolla, Missouri ***** (US)
- 专利权人： 브레우어 사이언스 인코포레이션
- 当前专利权人： 브레우어 사이언스 인코포레이션
- 当前专利权人地址： **** Brewer Drive, Rolla, Missouri ***** (US)
- 代理人： 강명구; 김현석
- 优先权： US13/198,294 2011-08-04; US61/371,517 2010-08-06
- 国际申请： PCT/US2011/046751 2011-08-05
- 国际公布： WO2012057893 2012-05-03
- 主分类号： H01L21/20
- IPC分类号： H01L21/20 ; H01L21/683 ; H01L23/00 ; B32B38/00 ; B32B38/10 ; B32B43/00
The multi-layer bonding scheme of bonding the semiconductor substrate is provided temporarily. In the bonding scheme of the present invention, at least one of the layers is in direct contact with the semiconductor substrate, at least two layers in direct contact with each other scheme. The present invention in a multi-layer structures different layers provides a number of process options in accordance with carrying out a specific function. More importantly, it increases further the thermal stability and rough (harsh) increase further the compatibility with the back process step, by encapsulating and protecting the front bump on a wafer, lowering further the stress of the debonding process, on the front surface defect by reducing, it will improve the performance of a thin wafer handling solutions.
信息查询:
EspacenetIPC结构图谱:
| H | 电学 |
| --H01 | 基本电气元件 |
| ----H01L | 半导体器件；其他类目未包含的电固体器件 |
| ------H01L21/00 | 专门适用于制造或处理半导体或固体器件或其部件的方法或设备 |
| --------H01L21/02 | .半导体器件或其部件的制造或处理 |
| ----------H01L21/027 | ..未在H01L21/18或H01L21/34组中包含的为进一步的光刻工艺在半导体之上制作掩膜 |
| ------------H01L21/18 | ...器件有由周期表第Ⅳ族元素或含有/不含有杂质的AⅢBⅤ族化合物构成的半导体，如掺杂材料 |
| --------------H01L21/20 | ....半导体材料在基片上的沉积，例如外延生长 |