基本信息:
- 专利标题： 플래시 메모리들을 위한 ＬＤＰＣ 소거 디코딩
- 专利标题（英）：Ldpc erasure decoding for flash memories
- 专利标题（中）：用于闪存存储器的LDPC擦除解码
- 申请号：KR1020127026747 申请日：2011-03-11
- 公开(公告)号：KR1020130006472A 公开(公告)日：2013-01-16
- 发明人： 종,하오 , 리,얀 , 다닐락,라도슬라브 , 코헨,얼티
- 申请人： 엘에스아이 코포레이션
- 申请人地址： **** Ridder Park Drive, San Jose, CA *****, U.S.A.
- 专利权人： 엘에스아이 코포레이션
- 当前专利权人： 엘에스아이 코포레이션
- 当前专利权人地址： **** Ridder Park Drive, San Jose, CA *****, U.S.A.
- 代理人： 특허법인 남앤드남
- 优先权： US61/313,681 2010-03-12
- 国际申请： PCT/US2011/028244 2011-03-11
- 国际公布： WO2011113034 2011-09-15
- 主分类号： G11C16/06
- IPC分类号： G11C16/06 ; G11C16/04 ; G11C29/42 ; H03M13/11
Semiconductor disk (SSD) controller uses the LDPC decoding to enable the flash memory with an improved access latency, and / or error correction capability. With the SLC flash memory has a BER less than a predetermined value, SSD controller uses a 1-bit read (Single read) LDPC hard decision decoder to access the flash memory. If the LDPC hard decision decoder detects this error correction impossible, SSD controller uses the 1.5-bit read (second reading) erasure determination LDPC decoder to access the flash memory. With two different pre-flash memory having a raw BER (raw BER) between the determined values, SSD controller uses only omit the use of the LDPC hard decision decoder, only erasure determination LDPC decoder to access the flash memory. Changes in the SSD controller are accessed similarly to the MLC flash memory. Some SSD controllers and the hard decision on the basis of the dynamic erase decoder selection criteria - and dynamically switch between-based decoder.
公开/授权文献:
- KR101466555B1 플래시 메모리들을 위한 ＬＤＰＣ 소거 디코딩 公开/授权日：2014-12-02