基本信息:
- 专利标题: 반도체 장치 및 그 제조방법
- 专利标题(英):Semiconductor device and method for fabricating the same
- 专利标题(中):半导体器件及其制造方法
- 申请号:KR1020100006332 申请日:2010-01-25
- 公开(公告)号:KR1020110086932A 公开(公告)日:2011-08-02
- 发明人: 이상현
- 申请人: 에스케이하이닉스 주식회사
- 申请人地址: 경기도 이천시 부발읍 경충대로 ****
- 专利权人: 에스케이하이닉스 주식회사
- 当前专利权人: 에스케이하이닉스 주식회사
- 当前专利权人地址: 경기도 이천시 부발읍 경충대로 ****
- 代理人: 특허법인신성
- 主分类号: H01L21/336
- IPC分类号: H01L21/336 ; H01L29/78
摘要:
PURPOSE: A semiconductor apparatus and a manufacturing method of the same are provided to prevent an increasing junction leakage current due to an increasing degree of integration, an increasing tunneling leakage current due to increasing electric field, and characteristic deterioration of a semiconductor apparatus due to an increasing leakage current. CONSTITUTION: A semiconductor apparatus includes a gate electrode(35), a gate insulating layer(32A), a drain region(D), and a source region(S). The gate electrode is located on a substrate. The gate insulating layer intervenes between the gate electrode and the substrate, and the thickness at one edge of the gate electrode is locally thicker. The drain region and source region are respectively formed on one side of the gate electrode and another side of the substrate and has an asymmetric structure.
摘要(中):
目的:提供一种半导体装置及其制造方法,以防止由于集成度的增加而导致的结漏电流增加,由于电场增加引起的隧道漏电流增加,以及因半导体装置的特性劣化 增加泄漏电流。 构成:半导体装置包括栅极电极(35),栅极绝缘层(32A),漏极区域(D)和源极区域(S)。 栅电极位于基板上。 栅极绝缘层介于栅电极和衬底之间,并且栅电极的一个边缘处的厚度局部变厚。 漏极区域和源极区域分别形成在栅电极的一侧和衬底的另一侧上,并且具有不对称结构。
信息查询:
EspacenetIPC结构图谱:
H | 电学 |
--H01 | 基本电气元件 |
----H01L | 半导体器件;其他类目未包含的电固体器件 |
------H01L21/00 | 专门适用于制造或处理半导体或固体器件或其部件的方法或设备 |
--------H01L21/02 | .半导体器件或其部件的制造或处理 |
----------H01L21/027 | ..未在H01L21/18或H01L21/34组中包含的为进一步的光刻工艺在半导体之上制作掩膜 |
------------H01L21/18 | ...器件有由周期表第Ⅳ族元素或含有/不含有杂质的AⅢBⅤ族化合物构成的半导体,如掺杂材料 |
--------------H01L21/26 | ....用波或粒子辐射轰击的 |
----------------H01L21/335 | .....场效应晶体管 |
------------------H01L21/336 | ......带有绝缘栅的 |