基本信息:
- 专利标题： 평면 절연 기재 상에 전도성 패턴을 형성시키기 위한 장치, 방법, 평면 절연 기재 및 이의 칩셋
- 专利标题（英）：An apparatus, a method for establishing a conductive pattern on a planar insulating substrate, the planar insulating substrate and a chipset thereof
- 专利标题（中）：一种装置，用于建立平面绝缘基板上的导电图案的方法，平面绝缘基板及其薄片
- 申请号：KR1020107027710 申请日：2008-05-09
- 公开(公告)号：KR1020110006720A 公开(公告)日：2011-01-20
- 发明人： 마이잘라,주하 , 시르비오,페트리
- 申请人： 스토라 엔소 오와이제이
- 申请人地址： KANAVARANTA *, FIN-***** HELSINKI (FI)
- 专利权人： 스토라 엔소 오와이제이
- 当前专利权人： 스토라 엔소 오와이제이
- 当前专利权人地址： KANAVARANTA *, FIN-***** HELSINKI (FI)
- 代理人： 특허법인 남앤드남
- 国际申请： PCT/FI2008/050256 2008-05-09
- 国际公布： WO2009135985 2009-11-12
- 主分类号： H05K3/10
- IPC分类号： H05K3/10 ; C23C26/00 ; C23C24/08
It is conductive particles comprising at least one module configured to form a prescribed pattern on the planar insulating substrate so that they can be collected according to a predefined pattern, an apparatus, a method, a planar insulating substrate and a chip substrate. Another of the at least one module is configured to transfer the conductive particles to the planar insulating substrate, wherein the conductive particles are arranged to be collected in accordance with a prescribed pattern. Sintering module is configured to melting the conductive particles on the planar insulating substrate, wherein the conductive particles are arranged so as to be melted in accordance with a prescribed pattern to form a conductive surface on a flat insulating substrate. Embodiments of the present invention can be printed onto the fibrous web, or on the printing electronics.
信息查询:
EspacenetIPC结构图谱:
| H | 电学 |
| --H05 | 其他类目不包含的电技术 |
| ----H05K | 印刷电路；电设备的外壳或结构零部件；电气元件组件的制造 |
| ------H05K3/00 | 用于制造印刷电路的设备或方法 |
| --------H05K3/10 | .其中将导电材料按照形成所要求的导电图案的方式敷至绝缘支承物上的 |