基本信息:
- 专利标题: 회로화되고 유연한 유기성 기판에 고밀도 다중레벨 박막을 전사하고 전기적으로 결합하는 방법 및 연관된 디바이스
- 专利标题(英):Method of transferring and electrically joining a high density multilevel thin film to a circuitized and flexible organic substrate and associated devices
- 专利标题(中):传输和电连接高密度多层薄膜到电路和柔性有机基板及相关器件的方法
- 申请号:KR1020137018792 申请日:2011-12-22
- 公开(公告)号:KR101494988B1 公开(公告)日:2015-02-23
- 发明人: 웨더스푼,마이클 , 니콜,데이비드 , 렌데크,루이스,조셉,주니어.
- 申请人: 해리스 코포레이션
- 申请人地址: 미합중국 플로리다 ***** 멜보른 웨스트 나사 블러바드 ****
- 专利权人: 해리스 코포레이션
- 当前专利权人: 해리스 코포레이션
- 当前专利权人地址: 미합중국 플로리다 ***** 멜보른 웨스트 나사 블러바드 ****
- 代理人: 특허법인 아이퍼스
- 优先权: US13/006,973 2011-01-14
- 国际申请: PCT/US2011/066734 2011-12-22
- 国际公布: WO2012096774 2012-07-19
- 主分类号: H05K3/46
- IPC分类号: H05K3/46 ; H05K3/36 ; H05K1/14
The present invention relates to a method for fabricating an electronic device comprising forming an interconnection layer on the sacrificial substrate stack having a dielectric layer between a plurality of conductor pattern layers, and the adjacent conductor pattern layer. The method also includes laminating and electrically coupled through the liquid crystal polymer bond between the metal (LCP) substrate interconnection layer stack on the opposite side of the sacrificial substrate. The method further includes electrically coupling the at least one first device for the removal of the sacrificial substrate to expose the pattern of the conductor layer, and the least significant, and the least significant pattern of the conductor layer.
公开/授权文献:
信息查询:
EspacenetIPC结构图谱:
H | 电学 |
--H05 | 其他类目不包含的电技术 |
----H05K | 印刷电路;电设备的外壳或结构零部件;电气元件组件的制造 |
------H05K3/00 | 用于制造印刷电路的设备或方法 |
--------H05K3/46 | .多层电路的制造 |